R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 687

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Figure 16.16 Example of Operation for Transmission in Clocked Synchronous Mode
Synchronization
clock
Serial data
TDRE
TEND
TXI interrupt
request generated
Write transmit data to TDR and
clear TDRE flag in SSR to 0
Read TDRE flag in SSR
Read TEND flag in SSR
Clear TE bit in SCR to 0
All data transmitted
Start transmission
Figure 16.17 Sample Serial Transmission Flowchart
Initialization
TDRE = 1
TEND = 1
<End>
Yes
Yes
Yes
Data written to TDR
and TDRE flag cleared
to 0 in TXI interrupt
processing routine
Bit 0
Transfer direction
Bit 1
1 frame
No
No
No
[3]
[2]
[1]
Bit 7
TXI interrupt
request generated
[1] SCI initialization:
[2] SCI state check and transmit data
[3] Serial transmission continuation
Section 16 Serial Communication Interface (SCI)
Bit 0
The TxD pin is automatically
designated as the transmit data output
pin.
write:
Read SSR and check that the TDRE
flag is set to 1, then write transmit data
to TDR and clear the TDRE flag to 0.
procedure:
To continue serial transmission, be
sure to read 1 from the TDRE flag to
confirm that writing is possible, then
write data to TDR, and then clear the
TDRE flag to 0. However, the TDRE
flag is checked and cleared
automatically when the DTC or DMAC
is initiated by a transmit data empty
interrupt (TXI) request and writes data
to TDR.
Rev. 2.00 Sep. 16, 2009 Page 657 of 1036
Bit 1
TEI interrupt request
generated
Bit 6
Bit 7
REJ09B0414-0200

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