R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 688

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 16 Serial Communication Interface (SCI)
16.6.4
Figure 16.18 shows an example of SCI operation for reception in clocked synchronous mode. In
serial reception, the SCI operates as described below.
1. The SCI performs internal initialization in synchronization with a synchronization clock input
2. If an overrun error (when reception of the next data is completed while the RDRF flag in SSR
3. If reception finishes successfully, the RDRF bit in SSR is set to 1, and receive data is
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REJ09B0414-0200
or output, starts receiving data, and stores the receive data in RSR.
is still set to 1) occurs, the ORER bit in SSR is set to 1. If the RIE bit in SCR is set to 1 at this
time, an ERI interrupt request is generated. Receive data is not transferred to RDR. The RDRF
flag remains to be set to 1.
transferred to RDR. If the RIE bit in SCR is set to 1 at this time, an RXI interrupt request is
generated. Because the RXI interrupt processing routine reads the receive data transferred to
RDR before reception of the next receive data has finished, continuous reception can be
enabled.
Figure 16.18 Example of Operation for Reception in Clocked Synchronous Mode
Synchronization
clock
Serial data
RDRF
ORER
Serial Data Reception (Clocked Synchronous Mode)
RXI interrupt
request
generated
Bit 7
Bit 0
RDR data read and
RDRF flag cleared
to 0 in RXI interrupt
processing routine
1 frame
Bit 7
Bit 0
RXI interrupt
request generated
Bit 1
Bit 6
ERI interrupt request
generated by overrun
error
Bit 7