R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 704

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Section 16 Serial Communication Interface (SCI)
16.8.2
Table 16.13 shows the interrupt sources in smart card interface mode. A transmit end (TEI)
interrupt request cannot be used in this mode.
Table 16.13 SCI Interrupt Sources
Data transmission/reception using the DTC or DMAC is also possible in smart card interface
mode, similar to in the normal SCI mode. In transmission, the TEND and TDRE flags in SSR are
simultaneously set to 1, thus generating a TXI interrupt. This activates the DTC or DMAC by a
TXI request thus allowing transfer of transmit data if the TXI request is specified as a source of
DTC or DMAC activation beforehand. The TDRE and TEND flags are automatically cleared to 0
at data transfer by the DTC or DMAC. If an error occurs, the SCI automatically re-transmits the
same data. During re-transmission, the TEND flag remains as 0, thus not activating the DTC or
DMAC. Therefore, the SCI and DTC or DMAC automatically transmit the specified number of
bytes, including re-transmission in the case of error occurrence. However, the ERS flag in SSR,
which is set at error occurrence, is not automatically cleared; the ERS flag must be cleared by
previously setting the RIE bit in SCR to 1 to enable an ERI interrupt request to be generated at
error occurrence.
When transmitting/receiving data using the DTC or DMAC, be sure to set and enable the DTC or
DMAC prior to making SCI settings. For DTC or DMAC settings, see section 9, DMA Controller
(DMAC) and section 10, Data Transfer Controller (DTC).
In reception, an RXI interrupt request is generated when the RDRF flag in SSR is set to 1. This
activates the DTC or DMAC by an RXI request thus allowing transfer of receive data if the RXI
request is specified as a source of DTC or DMAC activation beforehand. The RDRF flag is
automatically cleared to 0 at data transfer by the DTC or DMAC. If an error occurs, the RDRF
flag is not set but the error flag is set. Therefore, the DTC or DMAC is not activated and an ERI
interrupt request is issued to the CPU instead; the error flag must be cleared.
Rev. 2.00 Sep. 16, 2009 Page 674 of 1036
REJ09B0414-0200
Name
ERI
RXI
TXI
Receive error or
error signal
detection
Receive data full
Transmit data
empty
Interrupt Source
Interrupts in Smart Card Interface Mode
Interrupt Flag
ORER, PER, or
ERS
RDRF
TDRE
DMAC Activation DTC Activation
Not possible
Possible
Possible
Not possible
Possible
Possible
Priority
High
Low

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