MPC8349E-MITXE Freescale Semiconductor, MPC8349E-MITXE Datasheet - Page 32

• Manufacturer Part Number: MPC8349E-MITXE
• Description: BOARD REFERENCE FOR MPC8349
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II™ PROr
• Type: MPUr

Specifications of MPC8349E-MITXE

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MPC8349E
• Interface Type: Ethernet, USB
• Silicon Manufacturer: Freescale
• Core Architecture: Power Architecture
• Core Sub-architecture: PowerQUICC
• Silicon Core Number: MPC83xx
• Silicon Family Name: PowerQUICC II PRO
• Rohs Compliant: Yes
• For Use With/related Products: MPC8349E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MPC8349E-MITXE

MPC8349E-mITXE Board
1.6.4
The reset configuration word (RCW) controls the clock ratios and other basic device functions such as PCI
host or agent mode, boot location, TSEC modes, and endian mode. The reset configuration word is divided
into reset configuration word lower (RCWL) and reset configuration word higher (RCWH) and is loaded
from the local bus during the power-on or hard reset flow. The default RCW low bit setting is
0x0404_0000. The default RCW high bit setting is 0xB460_A000.
The RCW is located at the lowest 64 bytes of the boot Flash memory, which is 0xFE00_0000 if the default
memory map is used.
The RCW definitions are shown in
32
Field PCIHOST PCI64 PCI1ABR PCI2ABR COREDIS BMS BOOTSEQ SWEN ROMLOC
Field
Field
Field
LBIUCM DDRCM
16
16
0
0
TSEC1M
Bits
Reset Configuration Word
0
1
17
17
1
1
Figure 25. Reset Configuration Word High (RCWH) Bit Settings
Figure 24. Reset Configuration Word Low (RCWL) Bit Settings
MPC8349E-mITXE Reference Design Platform User’s Guide, Rev. 2
FE000000:
FE000010:
FE000020:
FE000030:
LBIUCM
DDRCM
18
Name
2
18
2
TSEC2M
—
19
Table 19. Default RCW in Flash Memory
Preliminary—Subject to Change Without Notice
3
B4B4B4B4
A0A0A0A0
Figure 24
04040404
00000000
19
Table 20. RCWL Bit Descriptions
3
Local bus memory
controller clock
mode
DDR SDRAM
memory controller
clock mode
20
4
Meaning
21
5
20
and
4
SPMF
B4B4B4B4
A0A0A0A0
Address
04040404
00000000
Figure
22
6
21
5
—
Local Bus Controller Clock: CSB_CLK
0: Default
1:
DDR Controller Clock: CSB_CLK
0: Default
1:
25.
23
7
22
6
04040404
00000000
60606060
00000000
—
24
—
23
8
7
25
24
9
8
Description
04040404
00000000
60606060
00000000
25 26 27
10
26
9
ratio 1:1
ratio 2:1
ratio 1:1
ratio 2:1
10 11
11
27
COREPLL
Freescale Semiconductor
TLE LALE LDP
12
28
12
28
13
29
13
29
—
14
30
14
30
15
31
15
31
—