R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 6

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

SuperH
I
RISC-type instruction set
• Instruction length: fixed
• Load-store architecture
• Delayed unconditional branch
• Instruction set optimized
CPU register set
• Sixteen 32-bit general-purpose
• Up to 7 control registers and
Efficient caching scheme
for each series
• LRU replacement policy
• Each family’s cache architecture
16-bit-long instructions for
improved code efficiency
(basic arithmetic and logic
operations are carried out
between registers)
instructions reduce pipeline
disruption
for the C language
registers
4 system registers for fast jumps
and interrupt response
algorithm for improved hit rates
has been optimized for the best
latency/miss-rate balance: e.g.,
SH-4A devices have 32KB +
32KB, 4-way set-associative,
separate instruction and operand
caches for improved performance
SuperH Architecture:
Common Features
®
Family of Microcontrollers & Microprocessors
SuperH Instruction Set
SuperH Programming Model
Program Counter
General Register
Control Register
System Register
92 DSP instructions
92 DSP instructions
16-/32-bit length
160 instructions
SH3-DSP
154 instructions
SH2-DSP
: Accessible only in Privilege mode (SH-3 and SH-4 only)
Mixed
MACH: Multiply and Accumulator High
MACL: Multiply and Accumulator Low
31
R0
R1
R2
R7
R14
R15
31
31
31
MD RR RI
GBR: Global Base Register
PR: Procedure Register
PC: Program Counter
SR: Status Register
Single/double-precision FPU
•
•
•
•
•
•
FPU, Cache operations
M Q I I I I . . S T
103 instructions
91 instructions
68 instructions
62 instructions
56 instructions
compatibility
16-bit length
MMU Control
SH-4A
32-bit MAC
SH-4
SH-3
SH-2
SH-1
Code
Fixed
0
0
0
0
- -
-
31
R0
R1
R2
R7
31
31
SPC: Saved Program Counter
SSR: Saved Status Register
16-/32-bit length
VBR: Vector Base Register
Enhanced shift, bit,
& divide operations
112 Instructions
91 instructions
SH-2A
with FPU
Mixed
• •
•
0
0
0
- -
-
4