C8051F350-TB Silicon Laboratories Inc, C8051F350-TB Datasheet
C8051F350-TB
Manufacturer Part Number
C8051F350-TB
Description
PROTOTYPINGBOARDWITH C8051F350
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F350-TB
Contents
Board
Processor To Be Evaluated
C8051F35x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F350
Silicon Family Name
C8051F35x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F350
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Analog Peripherals
24-Bit ADC
-
-
-
-
-
-
Two 8-Bit Current DACs
Comparator
-
-
-
Internal Voltage Reference
V
On-Chip Debug
-
-
-
-
Supply Voltage: 2.7 to 3.6 V
-
-
Temperature Range: –40 to +85 °C
Precision Mixed Signal
DD
0.0015% nonlinearity
Programmable throughput up to 1 ksps
8 external inputs; programmable as single-ended or differential
Programmable amplifier gain: 128, 64, 32, 16, 8, 4, 2, 1
Data-dependent windowed interrupt generator
Built-in temperature sensor (±3 °C)
16 Programmable hysteresis values and response time
Configurable to generate interrupts or reset
Low current (0.4 µA)
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
Provides breakpoints, single stepping, watchpoints
Inspect/modify memory, registers, and stack
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Typical operating current: 17 mA at 50 MHz
Typical stop mode current: <0.1 µA
RST/C2CK
Monitor/Brown-out Detector
VREF+
VREF-
AGND
GND
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
VDD
AV+
XTAL1
XTAL2
Analog
Power
Digital Power
24.5 MHz 2%
Oscillator
Internal
Oscillator
External
Circuit
C2D
16 µA at 32 kHz
M
A
U
X
POR
Buffer
Debug HW
Brown-
50 MIPS, 8 kB Flash, 24-Bit ADC, 32-Pin Mixed-Signal MCU
Out
Multiplier
Clock
+
+
Temp
Sensor
Copyright © 2005 by Silicon Laboratories
PGA
Offset
DAC
System
Clock
Reset
C
8
0
5
1
o
e
r
24-bit
ADC0
SFR Bus
256 Byte
512 Byte
FLASH
SRAM
XRAM
8 kB
VREF
High-Speed 8051 µC Core
-
-
-
Memory
-
-
Digital Peripherals
-
-
-
-
-
Clock Sources
-
-
-
-
Package
-
Ordering Part Numbers
-
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
Up to 50 MIPS throughput with 50 MHz clock
Expanded interrupt handler
768 bytes data RAM
8 kB Flash; in-system programmable in 512 byte sectors (512 bytes are
reserved)
17 port I/O; all 5 V tolerant
Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports
available concurrently
16-bit programmable counter array with three capture/compare modules,
WDT
4 general-purpose 16-bit counter/timers
Realtime clock mode using PCA or timer and external clock source
Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation
External oscillator: Crystal, RC, C, or clock (1 or 2 pin modes)
2x clock multiplier to achieve 50 MHz internal clock
Can switch between clock sources on-the-fly
32-pin LQFP (lead-free package)
C8051F350-GQ
Timer 0,
SPI Bus
SMBus
1, 2, 3
3-Chnl
Port 0
UART
Port 1
Port 2
Latch
PCA/
WDT
Latch
Latch
8-bit
IDAC0
8-bit
IDAC1
B
X
A
R
CP0A
CP0
C8051F350
C2D
P
0
D
P
1
D
v
v
r
r
+
-
CP0+
CP0-
P0.0
P0.1
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVSTR
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4/CP0A
P1.5/CP0
P1.6/IDAC0
P1.7/IDAC1
P2.0/C2D
5.5.2005
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C8051F350-TB Summary of contents
Page 1
... SFR Bus o 3-Chnl System PCA/ r Clock WDT e SMBus SPI Bus Port 1 VREF Latch Offset DAC 24-bit PGA ADC0 Temp Sensor Port 2 Latch Copyright © 2005 by Silicon Laboratories C8051F350 P0.0 P0.1 P P0.2/XTAL1 0 P0.3/XTAL2 D P0.4/TX r P0.5/RX v P0.6/CNVSTR X P0 CP0+ CP0 + R CP0- CP0A - P1.0 P1 ...
Page 2
... Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders = 2.5 V External, PGA Gain = 1x, MDCLK = 2.4567 MHz, REF CONDITIONS MIN 2.7 Monitor Enabled DD Monitor C8051F350DK Development Kit MIN NOM MAX (mm) (mm) (mm 1. ...