HW-V5-ML506-UNI-G Xilinx Inc, HW-V5-ML506-UNI-G Datasheet - Page 11

• Manufacturer Part Number: HW-V5-ML506-UNI-G
• Description: EVALUATION PLATFORM VIRTEX-5
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 SXTr
• Type: DSPr

Specifications of HW-V5-ML506-UNI-G

• Contents: Evaluation Platform, DVI Adapter and CompactFlash Card
• Silicon Manufacturer: Xilinx
• Features: JTAG Programming Interface, Platform Flash, External Clocking
• Kit Contents: Board, Cable, PSU, CD, Docs
• Silicon Family Name: Virtex-5
• Silicon Core Number: XC5VSX50TFFG1136
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: XC5VSX50TFFG1136
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ML505/ML506/ML507 Evaluation
Platform
Overview
ML505/ML506/ML507 Evaluation Platform
UG347 (v3.1.1) October 7, 2009
Features
R
ML505, ML506, and ML507 Evaluation Platforms (referred to as ML50x in this guide)
enable designers to investigate and experiment with features of the Virtex-5 LXT, SXT, and
FXT FPGAs. This user guide describes the features and operation of these platforms.
Although the ML50x platforms provide access to the Virtex-5 FPGA RocketIO™ GTP and
GTX transceivers, these boards are only intended for evaluation purposes, not for
transceiver characterization.
The ML505, ML506, and ML507 platforms use the same printed-circuit board (PCB). See
Appendix A, “Board Revisions”
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Xilinx Virtex-5 FPGA
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Two Xilinx XCF32P Platform Flash PROMs (32 Mb each) for storing large device
configurations
Xilinx System ACE™ CompactFlash configuration controller with Type I
CompactFlash connector
Xilinx XC95144XL CPLD for glue logic
64-bit wide, 256-MB DDR2 small outline DIMM (SODIMM), compatible with EDK
supported IP and software drivers
Clocking
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General purpose DIP switches (8), LEDs (8), pushbuttons, and rotary encoder
Expansion header with 32 single-ended I/O, 16 LVDS-capable differential pairs,
14 spare I/Os shared with buttons and LEDs, power, JTAG chain expansion
capability, and IIC bus expansion
Stereo AC97 audio codec with line-in, line-out, 50-mW headphone, microphone-in
jacks, SPDIF digital audio jacks, and piezo audio transducer
XC5VLX50T-1FFG1136 (ML505)
XC5VSX50T-1FFG1136 (ML506)
XC5VFX70T-1FFG1136 (ML507)
Programmable system clock generator chip
One open 3.3V clock oscillator socket
External clocking via SMAs (two differential pairs)
www.xilinx.com
for distinguishing characteristics.
Chapter 1
11