HW-V5-ML506-UNI-G Xilinx Inc, HW-V5-ML506-UNI-G Datasheet - Page 24

• Manufacturer Part Number: HW-V5-ML506-UNI-G
• Description: EVALUATION PLATFORM VIRTEX-5
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 SXTr
• Type: DSPr

Specifications of HW-V5-ML506-UNI-G

• Contents: Evaluation Platform, DVI Adapter and CompactFlash Card
• Silicon Manufacturer: Xilinx
• Features: JTAG Programming Interface, Platform Flash, External Clocking
• Kit Contents: Board, Cable, PSU, CD, Docs
• Silicon Family Name: Virtex-5
• Silicon Core Number: XC5VSX50TFFG1136
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: XC5VSX50TFFG1136
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Chapter 1: ML505/ML506/ML507 Evaluation Platform
24
Other Expansion I/O Connectors
Table 1-10: Expansion I/O Single-Ended Connections (J6) (Cont’d)
In addition to the high-speed I/O paths, additional I/O signals and power connections are
available to support expansion cards plugged into the ML50x board. Fourteen I/O pins
from the general-purpose pushbutton switches and LEDs on the board are connected to
expansion connector J5. This permits additional I/Os to connect to the expansion
connector if the pushbutton switches and LEDs are not used. The connection also allows
the expansion card to utilize the pushbutton switches and LEDs on the board.
The expansion connector also allows the board's JTAG chain to be extended onto the
expansion card by setting jumper J21 accordingly.
The IIC bus on the board is also extended onto the expansion connector to allow additional
IIC devices to be bused together. If the expansion IIC bus is to be utilized, the user must
J6 Pin
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
Schematic Net Name
www.xilinx.com
HDR1_18
HDR1_20
HDR1_22
HDR1_24
HDR1_26
HDR1_28
HDR1_30
HDR1_32
HDR1_34
HDR1_36
HDR1_38
HDR1_40
HDR1_42
HDR1_44
HDR1_46
HDR1_48
HDR1_50
HDR1_52
HDR1_54
HDR1_56
HDR1_58
HDR1_60
HDR1_62
HDR1_64
ML505/ML506/ML507 Evaluation Platform
FPGA Pin
AM33
AM32
AA34
AD32
AH34
AG32
AH32
AN34
AN33
AK34
AK33
AK32
AE32
AL34
AL33
AJ32
AJ34
M32
W32
N34
L33
Y34
Y32
P34
UG347 (v3.1.1) October 7, 2009
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