HW-V5-PCIE2-UNI-G Xilinx Inc, HW-V5-PCIE2-UNI-G Datasheet - Page 74

• Manufacturer Part Number: HW-V5-PCIE2-UNI-G
• Description: KIT DEV PCIEXPRESS GTX VIRTEX5
• Manufacturer: Xilinx Inc
• Series: Virtex™ -5r
• Type: FPGAr

Specifications of HW-V5-PCIE2-UNI-G

• Contents: Board, CD
• For Use With/related Products: Virtex™-5 FPGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 93: Global Clock Setup and Hold With DCM in Source-Synchronous Mode (Cont’d)
DS202 (v5.3) May 5, 2010
Product Specification
Notes:
1.
2.
3.
T
PSDCM0
Setup and Hold times are measured over worst case conditions (process, voltage, temperature). Setup time is measured relative to the
Global Clock input signal using the slowest process, highest temperature, and lowest voltage. Hold time is measured relative to the Global
Clock input signal using the fastest process, lowest temperature, and highest voltage. These measurements include DCM CLK0 jitter.
IFF = Input Flip-Flop or Latch
Use IBIS to determine any duty-cycle distortion incurred using various standards.
Symbol
/ T
PHDCM0
No Delay Global Clock and IFF
Source-Synchronous Mode
Description
(2)
with DCM in
www.xilinx.com
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
XC5VTX150T
XC5VTX240T
XC5VFX30T
XC5VFX70T
XC5VFX100T
XC5VFX130T
XC5VFX200T
Device
0.16
0.91
0.13
0.83
0.21
0.98
0.19
1.15
N/A
N/A
N/A
-3
Speed Grade
0.25
0.97
0.24
1.20
0.18
0.95
0.14
0.86
0.21
1.00
0.21
1.19
0.14
1.50
-2
0.25
1.03
0.24
1.26
0.19
1.01
0.14
0.92
0.21
1.05
0.24
1.25
0.16
1.55
-1
Units
ns
ns
ns
ns
ns
ns
ns
74