ATAVRONEKIT Atmel, ATAVRONEKIT Datasheet - Page 103

• Manufacturer Part Number: ATAVRONEKIT
• Description: KIT AVR/AVR32 DEBUGGER/PROGRMMR
• Manufacturer: Atmel
• Series: AVR®r
• Type: Debuggerr

Specifications of ATAVRONEKIT

• Contents: Programmer/Debugger
• Processor To Be Evaluated: AVR32
• Data Bus Width: 32 bit
• Interface Type: ISP, JTAG
• Core Architecture: AVR
• Kit Contents: ATAVRONEKIT
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Development Tool Type: Hardware / Software - Dev Kit (Dev Tool)
• Rohs Compliant: Yes
• Mcu Supported Families: AVR32 32-bit MCU
• For Use With/related Products: AVR® Devices
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8067M–AVR–09/10
15. JTAG enable does not override Analog Comparator B output
16. Bandgap measurement with the ADC is non-functional when V
17. DAC refresh may be blocked in S/H mode
18. Inverted I/O enable does not affect Analog Comparator Output
19. Both DFLLs and both oscillators has to be enabled for one to work
When JTAG is enabled this will not override the Anlog Comparator B (ACB)ouput, AC0OUT
on pin 7 if this is enabled.
Problem fix/Workaround
AC0OUT for ACB should not be enabled when JTAG is used. Use only analog comparator
output for ACA when JTAG is used, or use the PDI as debug interface.
The ADC cannot be used to do bandgap measurements when V
Problem fix/Workaround
If internal voltages must be measured when V
reference instead of the bandgap.
If the DAC is running in Sample and Hold (S/H) mode and conversion for one channel is
done at maximum rate (i.e. the DAC is always busy doing conversion for this channel), this
will block refresh signals to the second channel.
Problem fix/Workarund
When using the DAC in S/H mode, ensure that none of the channels is running at maximum
conversion rate, or ensure that the conversion rate of both channels is high enough to not
require refresh.
The inverted I/O pin function does not affect the Analog Comparator output function.
Problem fix/Workarund
Configure the analog comparator setup to give a inverted result (i.e. connect positive input to
the negative AC input and vice versa), or use and externel inverter to change polarity of
Analog Comparator Output.
In order to use the automatic runtime calibration for the 2 MHz or the 32 MHz internal oscilla-
tors, the DFLL for both oscillators and both oscillators has to be enabled for one to work.
Problem fix/Workarund
Enabled both DFLLs and oscillators when using automatic runtime calibration for one of the
internal oscillators.
CC
is below 2.7V, measure the internal 1.00V
CC
CC
is below 2.7V.
is below 2.7V
XMEGA A1
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