ATDM2120SN Atmel, ATDM2120SN Datasheet

no-image

ATDM2120SN

Manufacturer Part Number
ATDM2120SN
Description
DESIGN SYS PWRVIEW/SIMUL 20K GAS
Manufacturer
Atmel
Type
Maintenance Upgrader
Datasheet

Specifications of ATDM2120SN

For Use With/related Products
Atmel FPGA's
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
Description
Atmel’s Integrated Development System lets designers create fast, predictable de-
signs with AT6000 Series FPGAs.
Available for use on 486/Pentium, Sun Sparc, or HP workstation-based computers,
the Integrated Development System combines industry-standard software for design
entry and simulation with Atmel’s proprietary software for component generation,
automatic and interactive placement and routing, timing analysis, and bit stream gen-
eration.
The Integrated Development System design flow is shown below. Pre-layout modules
verify design logic, place and route modules implement the design, and post-layout
modules reflect the design as it actually appears in silicon.
A Design Manager provides push-button access to each step in the flow. The Design
Manager’s simple user interface streamlines the design flow as it creates a seamless
design environment. Design data is stored in a unified database that eliminates the
need for data re-entry and translation.
The Integrated Development System Physical Design System includes a prototype kit
and Viewlogic PRO Series (PC) or PowerView (Sun) macro libraries. Viewlogic timing
and functional simulation is optional. Mentor, Verilog, Synopsys, Cadence, and Exem-
plar library/interface packages are also available.
Integrated Development System
Support for Industry Standard PC and Workstation CAE tools
Combination Schematic, VHLD, PLD design entry
Macro Library of Over 200 Hard/Soft Functions
Automatic Macro Generators Generate Physical Layout
Floor Planning Capability
Automatic Place and Route
Interactive Layout Editing
Advanced Timing Analysis
Full Back-Annotation for Functional & Timing Simulation
Graphical User Interface
Unified Design Database
100% logical path coverage
No user-vector generation
Displays set-up/hold violations & speed critical paths
FPGA Overview
AT6000 FPGA
Integrated
Development
System
Overview
FPGA Integrated Development
System Overview
4-25
0438B

Related parts for ATDM2120SN

ATDM2120SN Summary of contents

Page 1

... Available for use on 486/Pentium, Sun Sparc workstation-based computers, the Integrated Development System combines industry-standard software for design entry and simulation with Atmel’s proprietary software for component generation, automatic and interactive placement and routing, timing analysis, and bit stream gen- eration. ...

Page 2

... PROcapture and PROSim Gate Simulation (20K gates) Customers with Viewlogic restricted licenses may pur- chase an Atmel 10K or 20K AT6000 Series Design Sys- tem & Viewlogic restricted license upgrade. A University system without a prototype kit is available for the ATDS2100PC and ATDS2110PC. ...

Page 3

... AT-style board for prototyping designs. Atmel now offers both 84-pin and 132-pin download boards for use with the Prototype Kit or the designer’s tar- get system. The boards can be attached to a host PC run- ning the AT6000 series software ...

Page 4

... Integraph Libraries & Interface for AT6000 Series Design System Maintenance Agreements Maintenance for AT6000 Series Physical Design System ATDM2100SN AT6000 Physical Design System with Powerview Schematic Entry and Viewlogic Simulator ATDM2120SN Maintenance for (20K) Maintenance for Viewlogic Viewsynthesis, ViewSim-VDHL Libraries & Interface for AT6000 ATDM2130SN Series Design System ATDM2140SN Maintenance for Exemplar Libraries & ...

Page 5

Ordering Code Description Maintenance for Cadence Verilog/Concept Libraries & Interface for AT6000 Series Design ATDM2170SN System ATDM2180SN Maintenance for Integraph Libraries & Interface for AT6000 Series Design University Sun-based Tools ATDS2100SNU University AT6000 Series Physical Design System University AT6000 Series ...

Related keywords