ATDM2140HP Atmel, ATDM2140HP Datasheet

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ATDM2140HP

Manufacturer Part Number
ATDM2140HP
Description
EXEMPLAR SYNTHESIS LIBS/INTRFC
Manufacturer
Atmel
Type
HP UX Basedr
Datasheet
1.ATDM2100HP.pdf (5 pages)

Specifications of ATDM2140HP

For Use With/related Products
AT6000 FPGA Development System
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
Description
Atmel’s Integrated Development System lets designers create fast, predictable de-
signs with AT6000 Series FPGAs.
Available for use on 486/Pentium, Sun Sparc, or HP workstation-based computers,
the Integrated Development System combines industry-standard software for design
entry and simulation with Atmel’s proprietary software for component generation,
automatic and interactive placement and routing, timing analysis, and bit stream gen-
eration.
The Integrated Development System design flow is shown below. Pre-layout modules
verify design logic, place and route modules implement the design, and post-layout
modules reflect the design as it actually appears in silicon.
A Design Manager provides push-button access to each step in the flow. The Design
Manager’s simple user interface streamlines the design flow as it creates a seamless
design environment. Design data is stored in a unified database that eliminates the
need for data re-entry and translation.
The Integrated Development System Physical Design System includes a prototype kit
and Viewlogic PRO Series (PC) or PowerView (Sun) macro libraries. Viewlogic timing
and functional simulation is optional. Mentor, Verilog, Synopsys, Cadence, and Exem-
plar library/interface packages are also available.
Integrated Development System
Support for Industry Standard PC and Workstation CAE tools
Combination Schematic, VHLD, PLD design entry
Macro Library of Over 200 Hard/Soft Functions
Automatic Macro Generators Generate Physical Layout
Floor Planning Capability
Automatic Place and Route
Interactive Layout Editing
Advanced Timing Analysis
Full Back-Annotation for Functional & Timing Simulation
Graphical User Interface
Unified Design Database
100% logical path coverage
No user-vector generation
Displays set-up/hold violations & speed critical paths
FPGA Overview
AT6000 FPGA
Integrated
Development
System
Overview
FPGA Integrated Development
System Overview
4-25
0438B

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ATDM2140HP Summary of contents

Page 1

... Available for use on 486/Pentium, Sun Sparc workstation-based computers, the Integrated Development System combines industry-standard software for design entry and simulation with Atmel’s proprietary software for component generation, automatic and interactive placement and routing, timing analysis, and bit stream gen- eration. ...

Page 2

... PROcapture and PROSim Gate Simulation (20K gates) Customers with Viewlogic restricted licenses may pur- chase an Atmel 10K or 20K AT6000 Series Design Sys- tem & Viewlogic restricted license upgrade. A University system without a prototype kit is available for the ATDS2100PC and ATDS2110PC. ...

Page 3

... AT-style board for prototyping designs. Atmel now offers both 84-pin and 132-pin download boards for use with the Prototype Kit or the designer’s tar- get system. The boards can be attached to a host PC run- ning the AT6000 series software ...

Page 4

Ordering Code Description ATDM2110PCI Maintenance for AT6000 Series Design System & Viewlogic restricted license 10K upgrade ATDM2120PC Maintenance for AT6000 Physical Design System with PROcapture and ProSim (20K) ATDM2120PCI Maintenance for AT6000 Series Design System & Viewlogic restricted license 20K ...

Page 5

... Maintenance for (20K) Maintenance for Viewlogic Viewsynthesis, ViewSim-VDHL Libraries & Interface for AT6000 ATDM2130HP Series Design System ATDM2140HP Maintenance for Exemplar Libraries & Interface for AT6000 Series Design System Maintenance for Mentor Libraries & Interface for AT6000 Series Design System ATDM2150HP ATDM2160HP Maintenance for Synopsys Libraries & ...

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