ATDS2120PC Atmel, ATDS2120PC Datasheet

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ATDS2120PC

Manufacturer Part Number
ATDS2120PC
Description
FPGA DESIGN SYS W/VWDRAW/VIEWSIM
Manufacturer
Atmel
Type
PC-Basedr
Datasheet
1.ATDM2100HP.pdf (5 pages)

Specifications of ATDS2120PC

For Use With/related Products
ATF15xx-DK2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
Description
Atmel’s Integrated Development System lets designers create fast, predictable de-
signs with AT6000 Series FPGAs.
Available for use on 486/Pentium, Sun Sparc, or HP workstation-based computers,
the Integrated Development System combines industry-standard software for design
entry and simulation with Atmel’s proprietary software for component generation,
automatic and interactive placement and routing, timing analysis, and bit stream gen-
eration.
The Integrated Development System design flow is shown below. Pre-layout modules
verify design logic, place and route modules implement the design, and post-layout
modules reflect the design as it actually appears in silicon.
A Design Manager provides push-button access to each step in the flow. The Design
Manager’s simple user interface streamlines the design flow as it creates a seamless
design environment. Design data is stored in a unified database that eliminates the
need for data re-entry and translation.
The Integrated Development System Physical Design System includes a prototype kit
and Viewlogic PRO Series (PC) or PowerView (Sun) macro libraries. Viewlogic timing
and functional simulation is optional. Mentor, Verilog, Synopsys, Cadence, and Exem-
plar library/interface packages are also available.
Integrated Development System
Support for Industry Standard PC and Workstation CAE tools
Combination Schematic, VHLD, PLD design entry
Macro Library of Over 200 Hard/Soft Functions
Automatic Macro Generators Generate Physical Layout
Floor Planning Capability
Automatic Place and Route
Interactive Layout Editing
Advanced Timing Analysis
Full Back-Annotation for Functional & Timing Simulation
Graphical User Interface
Unified Design Database
100% logical path coverage
No user-vector generation
Displays set-up/hold violations & speed critical paths
FPGA Overview
AT6000 FPGA
Integrated
Development
System
Overview
FPGA Integrated Development
System Overview
4-25
0438B

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ATDS2120PC Summary of contents

Page 1

... Available for use on 486/Pentium, Sun Sparc workstation-based computers, the Integrated Development System combines industry-standard software for design entry and simulation with Atmel’s proprietary software for component generation, automatic and interactive placement and routing, timing analysis, and bit stream gen- eration. ...

Page 2

... PROcapture Schematic Entry ATDS2110PC. AT6000 Series Physical Design Sys- tem with PROcapture and PROSim Gate Simulation (10K gates) ATDS2120PC. AT6000 Series Physical Design Sys- tem with PROcapture and PROSim Gate Simulation (20K gates) Customers with Viewlogic restricted licenses may pur- chase an Atmel 10K or 20K AT6000 Series Design Sys- tem & ...

Page 3

... AT6000 Series Design System & Viewlogic restricted license 10K upgrade AT6000 Physical Design System with PROcapture and ProSim (20K) ATDS2120PC ATDS2120PCI AT6000 Series Design System & Viewlogic restricted license 20K upgrade ATDS2130PC Viewlogic PROsynthesis, PROsim-VDHL Libraries & Interface for AT6000 Series Design System Exemplar Libraries & ...

Page 4

Ordering Code Description ATDM2110PCI Maintenance for AT6000 Series Design System & Viewlogic restricted license 10K upgrade ATDM2120PC Maintenance for AT6000 Physical Design System with PROcapture and ProSim (20K) ATDM2120PCI Maintenance for AT6000 Series Design System & Viewlogic restricted license 20K ...

Page 5

Ordering Code Description Maintenance for Cadence Verilog/Concept Libraries & Interface for AT6000 Series Design ATDM2170SN System ATDM2180SN Maintenance for Integraph Libraries & Interface for AT6000 Series Design University Sun-based Tools ATDS2100SNU University AT6000 Series Physical Design System University AT6000 Series ...

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