EVAL-AD7476ACB

Manufacturer Part NumberEVAL-AD7476ACB
DescriptionBOARD EVAL FOR AD7476A
ManufacturerAnalog Devices Inc
EVAL-AD7476ACB datasheet
 

Specifications of EVAL-AD7476ACB

Rohs StatusRoHS non-compliantNumber Of Adc's1
Number Of Bits12Sampling Rate (per Second)1M
Data InterfaceSerialInputs Per Adc1 Differential
Input Range0 ~ 5.25 VPower (typ) @ Conditions17.5mW @ 1MSPS, 5 V
Voltage Supply SourceSingleOperating Temperature-40°C ~ 85°C
Utilized Ic / PartAD7476A  
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FEATURES
Fast throughput rate: 1 MSPS
Specified for V
of 2.35 V to 5.25 V
DD
Low power
3.6 mW at 1 MSPS with 3 V supplies
12.5 mW at 1 MSPS with 5 V supplies
Wide input bandwidth
71 dB SNR at 100 kHz input frequency
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface
SPI®/QSPI™/MICROWIRE™/DSP compatible
Standby mode: 1 μA maximum
6-lead SC70 package
8-lead MSOP package
APPLICATIONS
Battery-powered systems
Personal digital assistants
Medical instruments
Mobile communications
Instrumentation and control systems
Data acquisition systems
High speed modems
Optical sensors
GENERAL DESCRIPTION
The AD7476A/AD7477A/AD7478A are 12-bit, 10-bit, and 8-bit
high speed, low power, successive-approximation analog-to-
digital converters (ADCs), respectively. The parts operate from
a single 2.35 V to 5.25 V power supply and feature throughput
rates up to 1 MSPS. The parts contain a low noise, wide
bandwidth track-and-hold amplifier that can handle input
frequencies in excess of 13 MHz. The conversion process and
data acquisition are controlled using CS and the serial clock,
allowing the devices to interface with microprocessors or DSPs.
The input signal is sampled on the falling edge of CS , and the
conversion is also initiated at this point. There are no pipeline
delays associated with the parts. The AD7476A/AD7477A/
AD7478A use advanced design techniques to achieve low power
dissipation at high throughput rates. The reference for the part
is taken internally from V
to allow the widest dynamic input
DD
range to the ADC. Thus, the analog input range for the part is
0 V to V
. The conversion rate is determined by the SCLK.
DD
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
2.35 V to 5.25 V, 1 MSPS,
12-/10-/8-Bit ADCs in 6-Lead SC70
AD7476A/AD7477A/AD7478A
FUNCTIONAL BLOCK DIAGRAM
V
12-/10-/8-BIT
SUCCESSIVE-
V
T/H
IN
APPROXIMATION
ADC
CONTROL
LOGIC
AD7476A/AD7477A/AD7478A
GND
Figure 1.
PRODUCT HIGHLIGHTS
1.
First 12-/10-/8-bit ADCs in a SC70 package.
2.
High throughput with low power consumption.
3.
Flexible power/serial clock speed management. The
conversion rate is determined by the serial clock, allowing
the conversion time to be reduced through the serial clock
speed increase. This allows the average power consumption
to be reduced when a power-down mode is used while not
converting. The parts also feature a power-down mode to
maximize power efficiency at lower throughput rates.
Current consumption is 1 μA maximum and 50 nA
typically when in power-down mode.
4.
Reference derived from the power supply.
5.
No pipeline delay. The parts feature a standard successive
approximation ADC with accurate control of the sampling
instant via a CS input and once-off conversion control.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
©2002–2009 Analog Devices, Inc. All rights reserved.
DD
SCLK
SDATA
CS
www.analog.com

EVAL-AD7476ACB Summary of contents

  • Page 1

    FEATURES Fast throughput rate: 1 MSPS Specified for Low power 3 MSPS with 3 V supplies 12 MSPS with 5 V supplies Wide input bandwidth 71 ...

  • Page 2

    ... Microprocessor Interfacing ........................................................... 23   AD7476A/AD7477A/AD7478A to TMS320C541 Interface .............................................................. 23   AD7476A/AD7477A/AD7478A to ADSP-218x Interface .... 23   AD7476A/AD7477A/AD7478A to DSP563xx Interface ...... 24   Application Hints ........................................................................... 25   Grounding and Layout .............................................................. 25   Evaluating the AD7476A/AD7477A Performance ............... 25   Outline Dimensions ....................................................................... 26   Ordering Guide .......................................................................... 26   Rev Page             ...

  • Page 3

    SPECIFICATIONS AD7476A SPECIFICATIONS MHz SCLK Table 1. Parameter DYNAMIC PERFORMANCE 3 Signal-to-Noise + Distortion (SINAD) 3 Signal-to-Noise Ratio (SNR) 3 Total Harmonic Distortion (THD) Peak Harmonic or Spurious ...

  • Page 4

    AD7476A/AD7477A/AD7478A Parameter LOGIC OUTPUTS Output High Voltage Output Low Voltage Floating-State Leakage Current Floating-State Output Capacitance 6 Output Coding CONVERSION RATE Conversion Time Track-and-Hold Acquisition Time 3 Throughput Rate POWER REQUIREMENTS Normal ...

  • Page 5

    AD7477A SPECIFICATIONS MHz SCLK Table 2. Parameter DYNAMIC PERFORMANCE 3 Signal-to-Noise + Distortion (SINAD) 3 Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise (SFDR) 3 Intermodulation Distortion ...

  • Page 6

    AD7476A/AD7477A/AD7478A Parameter POWER REQUIREMENTS Normal Mode (Static) Normal Mode (Operational) Full Power-Down Mode (Static) Full Power-Down Mode (Dynamic) 6 Power Dissipation Normal Mode (Operational) Full Power-Down Mode 1 Temperature range is from –40°C to +85°C. 2 ...

  • Page 7

    Parameter LOGIC INPUTS Input High Voltage, V INH Input Low Voltage, V INL Input Current SCLK Pin Pin Input Current Input Capacitance LOGIC OUTPUTS Output High Voltage Output ...

  • Page 8

    AD7476A/AD7477A/AD7478A TIMING SPECIFICATIONS MIN MAX Table 4. Parameter Limit MIN MAX SCLK × t CONVERT ...

  • Page 9

    Timing Diagrams 200 μ OUTPUT PIN C L 50pF 200 μ Figure 2. Load Circuit for Digital Output Timing Specifications Timing Example 1 Having MHz and a throughput of 1 ...

  • Page 10

    AD7476A/AD7477A/AD7478A ABSOLUTE MAXIMUM RATINGS 25°C, unless otherwise noted. A Table 5. Parameter V to GND DD Analog Input Voltage to GND Digital Input Voltage to GND Digital Output Voltage to GND Input Current to Any Pin Except ...

  • Page 11

    PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS AD7476A/ AD7477A/ GND 2 5 SDATA AD7478A V SCLK TOP VIEW (Not to Scale) Figure 5. 6-Lead SC70 Pin Configuration Table 6. Pin Function Descriptions Mnemonic Description ...

  • Page 12

    AD7476A/AD7477A/AD7478A TYPICAL PERFORMANCE CHARACTERISTICS Figure 7, Figure 8, and Figure 9 each show a typical FFT plot for the AD7476A, AD7477A, and AD7478A, respectively MSPS sample rate and 100 kHz input frequency. Figure 10 shows the signal-to-(noise ...

  • Page 13

    V = 2.35V 0.8 DD TEMP = 25°C f 0.6 SAMPLE 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 512 1024 1536 2048 2560 3072 CODE Figure 11. AD7476A INL Performance 1 0.8 TEMP = 25°C ...

  • Page 14

    AD7476A/AD7477A/AD7478A TERMINOLOGY Integral Nonlinearity (INL) INL is the maximum deviation from a straight line passing through the endpoints of the ADC transfer function. For the AD7476A/AD7477A/AD7478A, the endpoints of the transfer function are zero scale (1 LSB below the first ...

  • Page 15

    THEORY OF OPERATION CIRCUIT INFORMATION The AD7476A/AD7477A/AD7478A are fast, micropower, 12-/10-/8-bit, single-supply analog-to-digital converters (ADCs), respectively. The parts can be operated from a 2. 5.25 V supply. When operated from either supply ...

  • Page 16

    AD7476A/AD7477A/AD7478A TYPICAL CONNECTION DIAGRAM Figure 18 shows a typical connection diagram for the AD7476A/ AD7477A/AD7478A taken internally from V REF such, V should be well decoupled. This provides an analog DD input range ...

  • Page 17

    Table 8 provides typical performance data with various op amps used as the input buffer for a 100 kHz input tone at room temperature under the same setup conditions. Table 8. AD7476A Typical Performance with Various Input Buffers ...

  • Page 18

    AD7476A/AD7477A/AD7478A MODES OF OPERATION The modes of operation for the AD7476A/AD7477A/AD7478A are selected by controlling the (logic) state of the CS signal during a conversion. There are two possible modes of operation: normal and power-down. The point at which CS ...

  • Page 19

    CS SCLK SDATA CS SCLK SDATA THE PART BEGINS TO POWER SCLK SDATA When power supplies are first applied to the AD7476A/AD7477A/ AD7478A, the ADC can power up in either the power-down or normal modes. Because ...

  • Page 20

    AD7476A/AD7477A/AD7478A POWER VS. THROUGHPUT RATE By using the power-down mode on the AD7476A/AD7477A/ AD7478A when not converting, the average power consump- tion of the ADC decreases at lower throughput rates. Figure 23 shows that as the throughput rate is reduced, ...

  • Page 21

    SERIAL INTERFACE Figure 24, Figure 25, and Figure 26 show the detailed timing diagrams for serial interfacing to the AD7476A, AD7477A, and AD7478A, respectively. The serial clock provides the conversion clock and also controls the transfer of information from the ...

  • Page 22

    AD7476A/AD7477A/AD7478A CS going low clocks out the first leading zero to be read in by the microcontroller or DSP. The remaining data is then clocked out by subsequent SCLK falling edges beginning with the second leading zero. Thus, the first ...

  • Page 23

    MICROPROCESSOR INTERFACING The serial interface on the AD7476A/AD7477A/AD7478A allows the part to be directly connected to a range of different microprocessors. This section explains how to interface the AD7476A/AD7477A/AD7478A with some of the more common microcontroller and DSP serial interface ...

  • Page 24

    AD7476A/AD7477A/AD7478A To implement the power-down mode, set SLEN to 0111 to issue an 8-bit SCLK burst. The connection diagram is shown in Figure 29. The ADSP-218x has the TFS and RFS of the SPORT tied together, with TFS set as ...

  • Page 25

    ... PC via the EVAL-BOARD CONTROLLER. The EVAL-BOARD CONTROLLER can be used in conjunction with the AD7476ACB/AD7477ACB evaluation board, as well as many other Analog Devices and GND pins to DD evaluation boards ending in the CB designator, to demonstrate/evaluate the ac and dc performance of the AD7476A/AD7477A ...

  • Page 26

    AD7476A/AD7477A/AD7478A OUTLINE DIMENSIONS 2.20 2.00 1.80 2.40 1. 1.25 2. 1.80 1.15 PIN 1 0.65 BSC 1.30 BSC 1.00 1.10 0.90 0.80 0.70 0.30 0.10 MAX SEATING 0.15 PLANE 0.10 COPLANARITY COMPLIANT TO JEDEC ...

  • Page 27

    ... This board is a complete unit, allowing control and communicate with all Analog Devices evaluation boards ending in the CB designator. To order a complete evaluation kit, you will need to order the particular ADC evaluation board, for example, EVAL-AD7476ACB, the EVAL-CONTROLBRD2, and transformer. See relevant evaluation board application note for more information. ...

  • Page 28

    AD7476A/AD7477A/AD7478A NOTES ©2002–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02930-0-2/09(E) Rev Page ...