AD9517-4/PCBZ Analog Devices Inc, AD9517-4/PCBZ Datasheet - Page 64

• Manufacturer Part Number: AD9517-4/PCBZ
• Description: BOARD EVALUATION AD9517-4
• Manufacturer: Analog Devices Inc

Specifications of AD9517-4/PCBZ

• Design Resources: High Performance, Dual Channel IF Sampling Receiver (CN0140)
• Main Purpose: Timing, Clock Generator
• Utilized Ic / Part: AD9517-4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9517-4
Reg.
Addr.
(Hex)
0x01C
0x01D
0x01F
Bits
1
0
4
3
2
1
0
6
5
4
3
2
1
0
Name
REF1 power-on
Differential
reference
PLL status
register disable
LD pin comparator
enable
Holdover enable
External
holdover control
Holdover enable
VCO cal finished
Holdover active
REF2 selected
VCO frequency >
threshold
REF2 frequency >
threshold
REF1 frequency >
threshold
Digital lock detect
Description
When automatic reference switchover is disabled, this bit turns the REF1 power on.
0: REF1 power off (default).
1: REF1 power on.
Selects the PLL reference mode, differential or single-ended. Single-ended must be selected for the automatic
switchover or REF1 and REF2 to work.
0: single-ended reference mode (default).
1: differential reference mode.
Disables the PLL status register readback.
0: PLL status register enable (default).
1: PLL status register disable.
Enables the LD pin voltage comparator. This is used with the LD pin current source lock detect mode. When in the
internal (automatic) holdover mode, this enables the use of the voltage on the LD pin to determine if the PLL was
previously in a locked state (see
monitor the voltage on this pin.
0: disable LD pin comparator; internal/automatic holdover controller treats this pin as true (high) (default).
1: enable LD pin comparator.
Along with Bit 0, enables the holdover function. Automatic holdover must be disabled during VCO calibration.
0: holdover disabled (default).
1: holdover enabled.
Enables the external hold control through the SYNC pin. (This disables the internal holdover mode.)
0: automatic holdover mode—holdover controlled by automatic holdover circuit. (default)
1: external holdover mode—holdover controlled by SYNC pin.
Along with Bit 2, enables the holdover function. Automatic holdover must be disabled during VCO calibration.
0: holdover disabled (default).
1: holdover enabled.
Read-only register: status of the VCO calibration.
0: VCO calibration not finished.
1: VCO calibration finished.
Read-only register: indicates if the part is in the holdover state (see
0: not in holdover.
1: holdover state active.
Read-only register: Indicates which PLL reference is selected as the input to the PLL.
0: REF1 selected (or differential reference if in differential mode).
1: REF2 selected.
Read-only register: indicates if the VCO frequency is greater than the threshold (see
frequency status monitor).
0: VCO frequency is less than the threshold.
1: VCO frequency is greater than the threshold.
Read-only register: indicates if the frequency of the signal at REF2 is greater than the threshold frequency set by
Register 0x1A, Bit 6.
0: REF2 frequency is less than threshold frequency.
1: REF2 frequency is greater than threshold frequency.
Read-only register: indicates if the frequency of the signal at REF2 is greater than the threshold frequency
set by Register 0x01A, Bit 6.
0: REF1 frequency is less than threshold frequency.
1: REF1 frequency is greater than threshold frequency.
Read-only register: digital lock detect.
0: PLL is not locked.
1: PLL is locked.
Rev. B | Page 64 of 80
Figure 52
). Otherwise, this can be used with the REFMON and STATUS pins to
Figure 52
). This is not the same as holdover enabled.
Table 16
, REF1, REF2, and VCO