EZ80F910200ZCO Zilog, EZ80F910200ZCO Datasheet
EZ80F910200ZCO
Specifications of EZ80F910200ZCO
EZ80F910200ZCO
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EZ80F910200ZCO Summary of contents
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... Development Kit User Manual UM014220-0508 ® Copyright ©2008 by Zilog , Inc. All rights reserved. www.zilog.com ® Microcontrollers ...
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... UM014220-0508 eZ80F91 Development Kit Description Updated Figure 24 and Figure Updated Zilog logo, Zilog text, Disclaimer section. Introduction, eZ80F91 Module, ZDS II. 9 VDC power supply replaced with 6 VDC power supply on later builds. Windows Vista added. No changes to content. Introduction and Troubleshooting. Updated user interfaces for ZDS II and how to download code ...
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Safeguards The following precautions must be observed when working with the devices described in this document. Caution: Always use a grounding strap to prevent damage resulting from electrostatic discharge (ESD). UM014220-0508 eZ80F91 Development Kit User Manual Safeguards iii ...
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Table of Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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IrDA Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Flash Loader ...
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... I C EEPROM 2 – configuration register – GPIO, logic circuit, and memory headers – Supported by Zilog Developer Studio II and the eZ80 piler – LEDs, including LED matrix – Platform configuration jumpers – Two RS-232 connectors—console, modem – RS-485 connector with cable assembly – ...
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VDC power connector – Telephone jack • eZ80F91 Module: – eZ80F91 device operating at 50 MHz, with 256 KB of internal Flash memory and internal SRAM memory – 512 KB of off-chip SRAM memory – ...
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... Module, can operate in stand-alone mode with Flash memory, or interface via the ZPAK II Debug Tool or USB Smart Cable (ZUSBSC0100ZACG host PC running Zilog Developer Studio II Integrated Development Environment (ZDS II IDE) software. The address bus, data bus, and all eZ80F91 Module control signals are buffered on the eZ80Acclaim! Development Kit to provide sufficient drive capability ...
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GPIO eZ80F91 Address Bus Data Bus PHY Flash (1 MB) SRAM (512 KB) IrDA Transceiver External Battery eZ80F91 Module Figure 1. eZ80Acclaim! Figure 2 on page 5 displays eZ80Acclaim! into its key blocks, as shown in the legend for the ...
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Note: The above is an example only and might have a different configuration. See Key to blocks A–E: A. Power and serial communications B. eZ80F91 Module interface C. JTAG and ZDI debug interfaces D. Application module interfaces E. GPIO and ...
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Figure 3 displays the eZ80F91 Module segmented into its key blocks, as shown in the legend for the figure. D Note: Key to blocks A–C. A. eZ80F91 Module interfaces. B. eZ80F91 CPU. C. 10/100 BaseT Ethernet Interface D. IrDA transceiver. ...
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Development Kit This section describes the eZ80Acclaim! key components and its interfaces, including programming information such as memory maps and register definitions. Functional Description The eZ80Acclaim! Development Kit consists of seven major hardware blocks. These blocks are listed below ...
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Module Interface Figure 4. Basic eZ80Acclaim! UM014220-0508 eZ80F91 Development Kit GPIO Address Bus Data Bus RS232-0 SRAM (Console) (512 MB) RS232-1 (Modem) RS485_0/1 Connect LED (7x5 matrix) Embedded Modem GPIO and I C Address ...
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Physical Dimensions The dimensions of the eZ80Acclaim 182.9 mm. The overall height is 38.1 mm. See 43.2 mm 96.5 mm 5.1 mm Figure 5. Physical Dimensions of the eZ80Acclaim! UM014220-0508 eZ80F91 Development Kit ® Development Kit PCB is ...
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Operational Description The eZ80Acclaim! modules, provided that the module interfaces correctly to the eZ80Acclaim! Development Kit. The purpose of the eZ80Acclaim! Development Kit is to provide you a tool to evaluate the features of the eZ80F91 device, and to develop ...
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The description of these five signals are provided below. Enable Flash— Flash chip on the eZ80F91 Module. Flash Write Enable— enables write operations on the Flash boot block of the eZ80F91 Module. Disable IrDA— transceiver, located on the eZ80F91 Module, ...
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GND_EXT DIS_ETH GND_EXT BUSACK Figure 6. eZ80Acclaim! UM014220-0508 JP1 A10 A13 9 10 A15 11 12 A18 13 14 A19 A11 ...
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Table 3. eZ80Acclaim! Development Kit Peripheral Bus Connector Identification— 1,3 JP1 Pin # Symbol Signal Direction A10 GND A13 A15 ...
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Table 3. eZ80Acclaim! Development Kit Peripheral Bus Connector Identification— 1,3 JP1 (Continued) Pin # Symbol Signal Direction A17 25 DIS_ETH 26 EN_Flash 27 A21 A22 30 A23 31 CS0 32 CS1 33 ...
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Table 3. eZ80Acclaim! Development Kit Peripheral Bus Connector Identification— 1,3 JP1 (Continued) Pin # Symbol Signal Direction 45 GND INSTRD 49 BUSACK 50 BUSREQ Notes 1. For the sake of simplicity in describing the ...
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GND_EXT GND_EXT RESET V3.3_EXT HALT_SLP V3.3_EXT ® Figure 7. eZ80Acclaim! Development Kit I/O Connector Pin Configuration—JP2 UM014220-0508 JP2 PB7 1 2 PB5 3 4 PB3 5 6 PB1 PC6 11 12 PC4 13 14 PC2 15 ...
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Table 4. eZ80Acclaim! Development Kit I/O Connector Identification—JP2 Pin # Symbol Signal Direction 1 PB7 2 PB6 3 PB5 4 PB4 5 PB3 6 PB2 7 PB1 8 PB0 9 GND 10 PC7 11 PC6 12 PC5 13 PC4 ...
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Table 4. eZ80Acclaim! Development Kit I/O Connector Identification—JP2 Pin # Symbol Signal Direction 24 PD2 25 PD1 26 PD0 27 TDO 28 TDI/ZDA 29 GND 30 TRIGOUT 31 TCK/ZCL 32 TMS 33 RTC_V DD 34 EZ80CLK 35 SCL 36 ...
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... JP3 jumper that is resident on the Function On-chip Flash is enabled for writing. On-chip Flash memory is write- protected. eZ80F91 Development Kit User Manual 1 2 eZ80F91 Signal Yes Yes Figure 23 Affected Device On-chip Flash On-chip Flash ® Development Kit. Zilog’s eZ80 Development Kit 19 ...
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Thermostat Application Module (not provided in the kit example of an application-specific module that demonstrates an HVAC control sys- tem. Implementing an application module with the Application Module Interface requires that the eZ80F91 Module also be mounted on ...
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Table 6. GPIO Connector J6* (Continued) Signal Pin # Function PC[7:0] 39,41,43, Port C, Bit [7:0] 45,47,49, 51,53 ID_[2:0] 6,8,10 eZ80Acclaim! Development Kit ID CON_DIS 12 Console Disable Reserved 16,18 PD[7:0] 22,24,26, Port D, Bit[7:0] 28,30,32, 34,36 PB[7:0] 40,42,44, Port ...
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Table 7. CPU Bus Connector J8* (Continued) Signal Pin # BUSACK 37 NMI 39 D[0:7] 43–50 CS[0:3] 53–56 MREQ INSTRD 36 BUSREQ 38 PHI 40 Note: *All of the signals except BUSACK and INSTRD are driven by ...
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Table 8. LED and Port Emulation Addresses Address Register Function 800000h LED Anode/GPIO Port output control 800001h LED Cathode/Modem/Trig 800002h GPIO Data GPIO Emulation GPIO is emulated with the use of the GPIO Output Control Register and the GPIO Data ...
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Table 10. GPIO Data Register Function/Bit # GPIO D0 GPIO D1 GPIO D2 GPIO D3 GPIO D4 GPIO D5 GPIO D6 GPIO D7 Modem Reset The Modem Reset signal, MRESET, is used to reset an optional socket modem. This signal ...
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Figure 8. Trigger Pins J21 and J22 Bits 6 and 7 in bit the corresponding Trig1 and Trig2 signals are driven High. If either bit is 0, the corresponding Trig1 and Trig2 signals are driven Low. Embedded ...
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Figure 9. Embedded Modem Socket Interface—J1, J5, and J9 Table 11. Connector J5 Pin Symbol 1 M-TIP 2 M-RING Table 12. Connector J9 Pin Symbol Description 1 MRESET Reset, active Low, 50–100 ms. Closure to GND for reset 3 GND ...
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Table 12. Connector J9 (Continued RxD indicator; can drive an LED anode without additional circuitry 8 D3 DTR indicator; can drive an LED anode without additional circuitry 9 D4 TxD indicator; can drive an LED anode without additional ...
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The tested modem for this eZ80F91 Development Kit is a MultiTech Sys- tems (formerly Conexant) socket modem, part number SC56H1. Either the 3 the 5.0 V version of the modem can be used. However, jumper J12 should be ...
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Generic Array Logic device, GAL22LV10D (U10). On-Chip SRAM The eZ80F91 device on the eZ80F91 Module contains on-chip SRAM. Upon power-up, this SRAM is enabled and mapped to address . Using the RAM ...
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On-chip SRAM Platform Expansion SRAM Memory Off-module Expansion Module: Flash memory Flash Memory Expansion Module Flash Memory Off-chip Flash memory on the module On-chip Flash memory Figure 10. ...
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Chip Selects and Wait States— Figure 10, Flash memory is enabled by CS0, on-module SRAM is enabled by CS1, and the remainder of the resources are enabled by CS2. The number of wait states (N) for each Chip Select are ...
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... Cathode Row 1 Modem RST Trig 1 Trig 2 An LED display sample program is shipped with the eZ80F91 Develop- ment Kit. Refer to eZ80Acclaim! (QS0020 the Tutorial section in the Zilog Developer Studio II— eZ80Acclaim! UM014220-0508 Table 9 are LED anode bits. They must be set High (1) and Bit # ...
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Data Carrier Detect The Data Carrier Detect (DCD) signal at D1 indicates that a good carrier signal is being received from the remote modem. RX The RX signal at D2 indicates that data is received from the modem. Data Terminal ...
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RESET The Reset push button switch, SW4, resets the eZ80 eZ80Acclaim! Jumpers The eZ80Acclaim! Development Kit provides a number of jumpers that are used to enable or disable functionality on the platform, enable or dis- able optional features ...
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Table 17. J3—DIS_EM Shunt Status Function IN Application Module Hardware Disabled OUT Application Module Hardware Enabled Jumper J7 The J7 jumper connection controls Flash boot loader programming. When the shunt is placed, overwriting of the Flash boot loader program is ...
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The silk-screened label on the eZ80Acclaim! Note: for jumper J11 is incorrect. Currently, it reads DIS_FLASH. The correct label is EN_FLASH. Table 19. J11—EN_FLASH (Off-Chip)* Shunt Status Function IN All access to external Flash memory on the eZ80190 Module is ...
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Jumper J14 The J14 jumper connection controls the polarity of the Ring Indicator. See Table 21. Table 21. J14—RI Shunt Status Function 1–2 The Ring Indicator for UART1 is inverted. 2–3 The Ring Indicator for UART1 is not inverted. Jumper ...
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RS-485 circuit is enabled. When the shunt is placed, the RS-485 circuit is enabled. See Table 23. J16—RS485_2_EN Shunt Status Function IN The RS-485 circuit is enabled on UART1. The UART1 MODEM interface and the Socket Modem ...
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Table 25. J18—RT_2* Shunt Status Function IN The Termination Resistor for RS485_2 is IN. OUT The Termination Resistor for RS485_2 is OUT. Note: *Before enabling the termination resistor, ensure that the device is located at the end of the interface ...
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... ZPAK II Debug Tool, PC serial ports, external modems, the console, and LAN/telephone lines. J6 and J8 are the headers, or connectors, that provide pin-outs to connect any external application module, such as Zilog’s Thermostat Application Module. Connector J6 The J6 connector provides pin-outs to make use of GPIO functionality. ...
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Console Connector P2 is the RS-232 terminal, which can be used for observing the console output. P2 can be connected to the PC running HyperTerminal, if required. Modem Connector P3 provides a terminal for connecting an external modem, if used ...
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Module This section describes the eZ80F91 Module hardware, its interfaces and key components, including the CPU, real-time clock, IrDA transceiver, and memory. Functional Description The eZ80F91 Module is a compact, high-performance module specially designed for the rapid development and ...
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The discussion that follows references Bus contention can occur when two or more devices drive a common bus. CS0 on the eZ80F91 device drives the Flash CE. Upon accessing Flash ...
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... At this faster rate, data that is being written does not become corrupted because the write pulse is not yet asserted the date of publication of this document, Zilog has not completed an analysis of the effect that this 6.8 ns period of bus contention has on the design. An Application Note from SRAM and Bus Contention further explains this bus contention issue ...
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JP1 JP3 ISO C12 C11 C42 Figure 12. Physical Dimensions of the eZ80F91 Module UM014220-0508 56.0 mm eZ80F91 MODULE R15 R23 R16 R24 R25 U6 + R17 R18 R36 R22 VL1 R20 U8 C22 U1 ...
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Figure 13 displays the top layer silkscreen of the eZ80F91 Module. JP1 Figure 13. eZ80F91 Module—Top Layer UM014220-0508 eZ80F91 MODULE R15 R23 R16 R24 R25 U6 + R17 JP3 R18 R36 ISO R22 R20 U8 C22 R37 ...
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... C46 C34 C35 C33 C26 C29 C27 U9 L1 C32 C38 C28 C5 R26 C23 C37 R2 R1 R30 R12 C41 R5 MADE IN U.S.A. C2 ZiLOG FAB: 98C0879-001 REV A eZ80F91 Development Kit User Manual JP1 R35 R34 2 C16 R11 R33 R31 R32 C17 C15 eZ80F91 Module 47 ...
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Module Memory Static RAM The eZ80F91 Module features 512 KB of fast SRAM. Access speed is typically 12 ns, allowing zero-wait-state operation at 50 MHz. With the CPU at 50 MHz, SRAM can be accessed with zero wait states ...
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The RESET pin on the I/O connector reflects the status of the RESET line bidirectional pin for resetting external peripheral components or for resetting the eZ80F91 Development Kit with a low- impedance output (for example, a ...
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Figure 15 displays the eZ80F91 Module IrDA hardware connections. External Disable eZ80F91 Device Figure 15. IrDA Hardware Connections The eZ80F91 Module features an Infrared Encoder/Decoder register that configures the IrDA function. This register is located at address the internal I/O ...
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... IR_CTL = 0x01; Putchar(0xb0); Flash Loader Utility The Flash Loader utility integrated within ZDS II provides a convenient way to program on-chip Flash memory. Refer to Zilog Developer Studio II—eZ80Acclaim! Mounting the Module The eZ80F91 Module features two 60-pin connectors. However, the eZ80Acclaim! ule. When mounting the eZ80F91 Module onto the eZ80Acclaim! Devel- opment Kit, check its orientation to the platform to ensure a correct fit ...
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Development Kit’s JP2 socket. When the module is mounted correctly, it will overhang the edge of the eZ80Acclaim! Devel- opment Kit by 10 pins. Changing the Power Supply Plug The universal 9 VDC power supply offers three different plug ...
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Figure 17. Inserting a New Plug Configuration Note: Figure 17 is for the 9 VDC power supply. The 6 VDC power supply might look different. UM014220-0508 eZ80F91 Development Kit User Manual eZ80F91 Module 53 ...
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... The Thermostat Application module is equipped with an LCD display that can be used to display process control and other physical parameters. For additional reading about the Thermostat application, refer to Java Thermostat Demo Application Note (AN0104) available for download at www.zilog.com. UM014220-0508 eZ80F91 Development Kit ® ...
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... ZDS II Zilog Developer Studio II (ZDS II) Integrated Development Environment is a complete stand-alone system that provides a state-of-the-art develop- ment environment. Based on the Windows SP4/WinXP Professional user interfaces, ZDS II integrates a language- sensitive editor, project manager, C-Compiler, assembler, linker, librarian, and source-level symbolic debugger that supports the eZ80F91 device. ...
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... Troubleshooting Overview Before contacting Zilog Customer Support to submit a problem report, follow these simple steps hardware failure is suspected, contact a local Zilog representative for assistance. Cannot Download Code If you are unable to download code to RAM using ZDS, ensure to press and release the Reset button on the eZ80Acclaim! ...
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... GND MD3 24 PC4_DTR1 VDD MD4 25 VDD PC6_DCD1 GND MD5 26 GND PC3_CTS1 MD6 27 PC5_DSR1 MD7 28 PC7_RI1 29 PC0_TXD1 30 PC1_RXD1 ZiLOG 31 PC2_RTS1 32 910 E. Hamilton Avenue Title Schematic, eZ80L92 Evaluation Board Size Document Number B 96C0858-001 Date: Friday, October 10, 2003 Sheet User Manual C34 0.1uF B MD[7:0] ...
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A[23: A10 A11 A12 -EX_FL_DIS A13 A14 A15 A16 A17 A18 A19 U12 D[7:0] A20 A21 A22 A23 D2 7 ...
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A[23:0] A[23:0] A[23:0] U17 ...
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VDD C13 0.1uF U22 28 27 C1+ V+ C14 C15 0.1 1 C2+ 0.1 2 C2- TXD0 14 9 PD0_TXD0 T1IN T1OUT GND 13 10 T2IN T2OUT RTS0 12 11 PD2_RTS0 T3IN T3OUT 22 ...
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Figure 22. eZ80F91 Development Platform Schematic Diagram 5—RS-485 Cable UM014220-0508 MATES WITH AMP = 749268 LENGTH = 5’ WIRES 28 AWG eZ80F91 Development Kit User Manual 61 Schematics ...
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... VCC 11 VCC U3 C2 -RESET 2 RESET 0.1uF open-drain MAX6328UR29 SOT-23-L3 alternative: Maxim MAX6802UR29D3 Memory ZiLOG, Inc. 532 Race Street. San Jose,CA 95126. 408.558.8500 Title eZ80F91 Ethernet Module. Size Document Number B 96C0879-001 Date: Thursday, November 06, 2003 Sheet 2 Schematic Diagrams User Manual 62 1 -F91_WP ...
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... ZiLOG, Inc. ZiLOG, Inc. ZiLOG, Inc. 532 Race Street. San Jose,CA 95126. 408.558.8500 532 Race Street. San Jose,CA 95126. 408.558.8500 532 Race Street. San Jose,CA 95126. 408.558.8500 Title Title Title eZ80F91 Ethernet Module. eZ80F91 Ethernet Module. ...
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... Rev D schematic. VCC GND GND Memory ZiLOG, Inc. ZiLOG, Inc. ZiLOG, Inc. 532 Race Street. San Jose,CA 95126. 408.558.8500 532 Race Street. San Jose,CA 95126. 408.558.8500 532 Race Street. San Jose,CA 95126. 408.558.8500 Title Title Title eZ80F91 Ethernet Module. eZ80F91 Ethernet Module. ...
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Appendix A—General Array Logic Equations This appendix shows the equations for disabling the Ethernet signals pro- vided by the U10 and U15 General Array Logic (GAL) devices. U10 Address Decoder //`define idle //`define state1 //`define state2 //`define state3 // FOR ...
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nEX_FL_DIS F92 UM014220-0508 eZ80F91 Development Kit //disables Flash on the expansion //module, when Low //enables Development Platform LED ...
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MOD_DIS = ((nmemen1==0)|(nmemen2==0)|(nmemen3==0)|(nmemen4==0));//if any //of the signals is Low, //Flash on the Module will be //disabled if ...
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Flash is //disabled assign nCS_EX = (nEX_FL_DIS) ? nEXP_EN : ~(nEX_FL_DIS); assign ...
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F92_em_pal( nDIS_EM, nEM_EN, A0, A1, A2, A3, A4, A5, A6, A7, nRD, nCS, nWR, nMREQ, nIORQ, nEM_RD, nEM_WR, nAN_WR, nCT_WR, nDIS_ETH ); input nDIS_EM /* synthesis loc="P3"*/, nEM_EN A0 A1 UM014220-0508 eZ80F91 Development Kit /* synthesis loc="P4"*/, ...
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nIORQ nRD nCS nWR nMREQ output nEM_RD nEM_WR nCT_WR nAN_WR nDIS_ETH parameter anode=8'h00; parameter cathode=8'h01; parameter latch=8'h02; wire [7:0] address={A7,A6,A5,A4,A3,A2,A1,A0}; assign nEM_WR = ~((nDIS_EM==1)&(nWR==0)&(nEM_EN==0)&(address==latch)); assign nEM_RD = ~((nDIS_EM==1)&(nRD==0)&(nEM_EN==0)&(address==latch)); UM014220-0508 eZ80F91 Development Kit /* synthesis ...
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UM014220-0508 eZ80F91 Development Kit User Manual Appendix A—General Array Logic Equations 71 ...
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... Customer Support For answers to technical questions about the product, documentation, or any other issues with Zilog’s offerings, please visit Zilog’s Knowledge Base at http://www.zilog.com/kb. For any comments, detail technical questions, or reporting problems, please visit Zilog’s Technical Support at http://support.zilog.com. ...
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... Z8, Z8 Encore!, eZ80, and eZ80Acclaim!, and Z8 Encore! XP are registered trademarks of Zilog, Inc. All other product or service names are the property of their respective owners. UM014220-0508 eZ80F91 Development Kit ...