CA3059

Manufacturer Part NumberCA3059
DescriptionZERO VOLTAGE CROSSING SWITCH
ManufacturerIntersil
CA3059 datasheet
 


Specifications of CA3059

Rohs StatusRoHS non-compliant  
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The limiter stage of the zero-voltage switch clips the incom-
ing AC line voltage to approximately 8V. This signal is then
applied to the zero-voltage crossing detector, which gener-
ates an output pulse each time the line voltage passes
through zero. The limiter output is also applied to a rectifying
diode and an external capacitor, C
, that comprise the DC
F
power supply. The power supply provides approximately 6V
as the V
supply to the other stages of the zero-voltage
CC
switch. The on/off sensing amplifier is basically a differential
comparator. The thyristor gating circuit contains a driver for
direct triac triggering. The gating circuit is enabled when all
the inputs are at a “high” voltage, i.e., the line voltage must
be approximately zero volts, the sensing amplifier output
must be “high”, the external voltage to terminal 1 must be a
logical “0”, and, for the CA3059, the output of the fail-safe
circuit must be “high”. Under these conditions, the thyristor
(triac or SCR) is triggered when the line voltage is essen-
tially zero volts.
Thyristor Triggering Circuits
The diodes D
and D
in Figure 2 form a symmetrical clamp
1
2
that limits the voltages on the chip to 8V; the diodes D
D
form a half-wave rectifier that develops a positive voltage
13
on the external storage capacitor, C
.
F
The output pulses used to trigger the power switching thyris-
tor are actually developed by the zero crossing detector and
the thyristor gating circuit. The zero crossing detector con-
sists of diodes D
and through D
, transistor Q
2
6
associated resistors shown in Figure 2. Transistors Q
Q
through Q
and the associated resistors comprise the
6
9
thyristor gating circuit and output driver. These circuits gen-
erate the output pulses when the AC input is at a zero-volt-
age point so that RFI is virtually eliminated when the zero-
voltage switch and thyristor are used with resistive loads.
The operation of the zero crossing detector and thyristor gat-
ing circuit can be explained more easily if the on state (i.e.,
the operating state in which current is being delivered to the
thyristor gate through terminal 4) is considered as the oper-
ating condition of the gating circuit. Other circuit elements in
the zero-voltage switch inhibit the gating circuit unless cer-
tain conditions are met, as explained later.
In the on state of the thyristor gating circuit, transistors Q
and Q
are conducting, transistor Q
is off, and transistor Q
9
7
is on. Any action that turns on transistor Q
drive from transistor Q
and thereby turns off the thyristor.
8
Transistor Q
may be turned on directly by application of a
7
minimum of 1.2V at 10 A to the external inhibit input, termi-
nal 1. (If a voltage of more than 1.5V is available, an external
resistance must be added in series with terminal 1 to limit
the current to 1mA.) Diode D
isolates the base of transistor
10
Q
from other signals when an external inhibit signal is
7
applied so that this signal is the highest priority command for
normal operation. (Although grounding of terminal 6 creates
a higher priority inhibit function, this level is not compatible
with normal DTL or TTL logic levels.) Transistor Q
be activated by turning off transistor Q
from the power supply through resistor R
the base of Q
. Transistor Q
is normally maintained in con-
7
6
Application Note 6182
duction by current that flows into its base through resistor R
and diodes D
Transistor Q
1
When the voltage at terminal 5 is greater than +3V, current
can flow through resistor R
junction of transistor Q
on Q
. This action inhibits the delivery of a gate-drive output
1
signal at terminal 4. For negative voltages at terminal 5 that
have magnitudes greater than 3V, the current flows through
diode D
, the emitter-to-base junction of transistor Q
5
D
, and resistor R
3
sistor Q
is off only when the voltage at terminal 5 is less
1
than the threshold voltage of approximately 2V. When the
integrated circuit zero-voltage switch is connected as shown
in Figure 2, therefore, the output is a narrow pulse which is
approximately centered about the zero-voltage time in the
cycle, as shown in Figure 3. In some applications, however,
particularly those that use either slightly inductive or low
power loads, the thyristor load current does not reach the
latching current value† by the end of this pulse. An external
capacitor C
X
in Figure 4, can be used to delay the pule to accommodate
and
7
such loads. The amount of pulse stretching and delay is
shown in Figures 5(a) and 5(b).
GATE
PULSE
, and the
1
and
1
t
P1
t
P
FIGURE 3. WAVEFORM SHOWING OUTPUT PULSE
DURATION OF THE ZERO-VOLTAGE SWITCH.
R
120V
RMS
8
60Hz
6
removes the
7
FIGURE 4. USE OF A CAPACITOR BETWEEN TERMINALS 5
AND 7 TO DELAY THE OUTPUT PULSE OF THE
ZERO-VOLTAGE SWITCH
may also
7
to allow current flow
6
† The latching current is the minimum current required to sustain
and diode D
into
conduction immediately after the thyristor is switched from the off
7
10
to the on state and the gate signal is removed.
3
and D
when transistor Q
is off.
8
9
1
is a portion of the zero crossing detector.
, diode D
, the base-to-emitter
1
6
, and diode D
to terminal 7 to turn
1
4
, and again turns on transistor Q
1
connected between terminal 5 and 7, as shown
AC LINE
POSITIVE
NEGATIVE
dv/dt
dv/dt
t
N1
R
L
MT
9
2
10
10K
S
11
5
4
C
ZVS
G
MT
XI
1
7
2
ALL
13
RESISTANCE
8
6K
VALUES ARE
12
IN
+
5K
R
-
2
, diode
1
. Tran-
1
t
N