74VHC163MTC Fairchild Semiconductor, 74VHC163MTC Datasheet

74VHC163MTC

Manufacturer Part Number

74VHC163MTC

Description

IC COUNTER BINARY 4BIT 16TSSOP

Manufacturer

Fairchild Semiconductor

Series

74VHCr

Datasheet

1.74VHC163SJ.pdf (10 pages)

Specifications of 74VHC163MTC

Logic Type

Binary Counter

Direction

Number Of Elements

Number Of Bits Per Element

Reset

Synchronous

Count Rate

125MHz

Trigger Type

Positive Edge

Voltage - Supply

2 V ~ 5.5 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

16-TSSOP

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Timing

Current page: 1 of 10
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74VHC163M

74VHC163SJ

74VHC163MTC

74VHC163N

74VHC163

4-Bit Binary Counter with Synchronous Clear

General Description

The VHC163 is an advanced high-speed CMOS device

fabricated with silicon gate CMOS technology. It achieves

the high-speed operation similar to equivalent Bipolar

Schottky TTL while maintaining the CMOS low power dissi-

pation.

The VHC163 is a high-speed synchronous modulo-16

binary counter. This device is synchronously presettable for

application in programmable dividers and has two types of

Count Enable inputs plus a Terminal Count output for ver-

satility in forming multistage counters. The CLK input is

active on the rising edge. Both PE and MR inputs are

active on low logic level. Presetting is synchronous to rising

edge of CLK and the Clear function of the VHC163 is syn-

chronous to CLK. Two enable inputs (ENP and ENT) and

Carry Output are provided to enable easy cascading of

counters, which facilitates easy implementation of n-bit

counters without using external gates.

Ordering Code:

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Order Number

Package Number

MTC16

M16A

M16D

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

DS012122

An input protection circuit insures that 0V to 7V can be

applied to the input pins without regard to the supply volt-

age. This device can be used to interface 5V to 3V systems

and two supply systems such as battery backup. This cir-

cuit prevents device destruction due to mismatched supply

and input voltages.

Features

High speed: f

Low power dissipation: I

Synchronous counting and loading

High-speed synchronous expansion

High noise immunity: V

Power down protection is provided on all inputs.

Low noise: V

Pin and function compatible with 74HC163

Package Description

OLP

MAX

0.8V (max)

185 MHz (typ) at V

IEEE/IEC

NIH

September 1995

Revised February 2002

4 A (max) at T

NIL

28% V

www.fairchildsemi.com

(min)

25 C

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74VHC163MTC Summary of contents

Page 1

... M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHC163SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC163MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC163N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “ ...

Page 2

Connection Diagram Functional Description The VHC163 counts in modulo-16 binary sequence. From state 15 (HHHH) it increments to state 0 (LLLL). The clock inputs of all flip-flops are driven in parallel through a clock buffer. Thus all changes of the ...

Page 3

Mode Select Table Action on the Rising MR PE CET CEP Clock Edge ( Reset (Clear Load ( Count (Increment Change (Hold) ...

Page 4

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( OUT Input Diode Current ( Output Diode Current ( Output Current (I ) ...

Page 5

AC Electrical Characteristics V CC Symbol Parameter (V) t Propagation Delay PLH 3.3 0.3 t Time (CP–Q ) PHL n 5.0 0.5 t Propagation Delay PLH 3.3 0.3 t Time (CP–TC, Count) PHL 5.0 0.5 t Propagation Delay PLH 3.3 ...

Page 6

AC Operating Requirements Symbol Parameter t Minimum Setup Time S (P –CP Minimum Setup Time S (PE –CP) t Minimum Setup Time S (CEP or CET–CP) t Minimum Setup Time S (MR –CP) t Minimum Hold Time H ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M16D 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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