74VHC574M Fairchild Semiconductor, 74VHC574M Datasheet

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74VHC574M

Manufacturer Part Number
74VHC574M
Description
IC F/F OCTAL D-TYPE 3ST 20-SOIC
Manufacturer
Fairchild Semiconductor
Series
74VHCr
Type
D-Type Busr
Datasheet

Specifications of 74VHC574M

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
180MHz
Delay Time - Propagation
5.6ns
Trigger Type
Positive Edge
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Number Of Circuits
8
Logic Family
74VHC
Logic Type
D-Type Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
16.7 ns
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Flip-flop Type
D
Propagation Delay
7.5ns
Frequency
180MHz
Output Current
8mA
Ic Output Type
Tri State Non Inverted
Supply Voltage Range
2V To 5.5V
Rohs Compliant
Yes
Technology
CMOS
Number Of Bits
8
Number Of Elements
1
Clock-edge Trigger Type
Positive-Edge
Operating Supply Voltage (typ)
2.5/3.3/5V
Package Type
SOIC W
Frequency (max)
75MHz
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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© 2005 Fairchild Semiconductor Corporation
74VHC574M
74VHC574SJ
74VHC574MTC
74VHC574N
74VHC574
Octal D-Type Flip-Flop with 3-STATE Outputs
General Description
The VHC574 is an advanced high speed CMOS octal flip-
flop with 3-STATE output fabricated with silicon gate CMOS
technology. It achieves the high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. This 8-bit D-type flip-flop is
controlled by a clock input (CP) and an output enable input
(OE). When the OE input is HIGH, the eight outputs are in
a high impedance state.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery back up. This cir-
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
Pin Descriptions
Order Number
Package Number
MTC20
IEEE/IEC
M20B
M20D
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
D
CP
OE
O
Pin Names
0
0
–D
–O
7
7
DS011565
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
Connection Diagram
Description
High Speed: t
High Noise Immunity: V
Power Down Protection is provided on all inputs
Low Noise: V
Low Power Dissipation: I
Pin and Function Compatible with 74HC574
Package Description
OLP
PD
5.6 ns (typ) at V
0.6V (typ)
NIH
CC
March 1993
Revised May 2005
V
4 A (Max) @ T
NIL
CC
28% V
www.fairchildsemi.com
5V
CC
(Min)
A
25 C

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74VHC574M Summary of contents

Page 1

... M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74VHC574SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC574MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC574N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “ ...

Page 2

Functional Description The VHC574 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D ...

Page 3

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( OUT Input Diode Current ( Output Diode Current DC Output Current (I ) OUT DC V ...

Page 4

AC Electrical Characteristics V CC Symbol Parameter ( Propagation Delay 3.3 0.3 PLH t Time ( PHL n r 5.0 0 3-STATE Output 3.3 0.3 PZL t Enable Time PZH r 5.0 0.5 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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