AD1674 Analog Devices, AD1674 Datasheet
AD1674
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AD1674 Summary of contents
Page 1
... Analog Operation: The precision, laser-trimmed scaling and bipolar offset resistors provide four calibrated ranges +10 V and +20 V unipolar, – and – +10 V bipolar. The AD1674 operates and power supplies. 5. Flexible Digital Interface: On-chip multiple-mode three-state output buffers and interface logic allow direct connection to most microprocessors ...
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... V 5%, V MAX CC LOGIC 5% unless otherwise noted) AD1674J Min Typ 12 12 0.1 0 –5 – +4.5 +11.4 –16 385 9.9 10 MIN MAX –2– 10 – AD1674K Max Min Typ Max 0.25 0.1 0.25 + 1/2 1 –5 +5 +10 –10 +10 +10 0 +10 +20 ...
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... AD1674 AD1674B AD1674T Typ Max Min Typ Max Unit 12 Bits 1/2 1/2 LSB 1/2 1 LSB 12 Bits 2 2 LSB 3 3 LSB 0.1 0.125 0.1 ...
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... EE Test Conditions = LOGIC = 0 1 LOGIC –4– –15 V 10% or LOGIC EE 1 AD1674K/B/T Max Min Typ Max 70 71 –82 –90 –82 0.008 0.008 –82 –92 –82 1 500 –80 –90 –80 –80 –90 –80 50 250 1 10% or + LOGIC Min Max +2 ...
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... R STS DB11 – DB0 OUT 5 V 100 100 OUT Figure 3. Load Circuit for Bus Timing Specifications –5– AD1674 10% or +12 V 5 HEC HSC CS t SSC SRC HRC R SAC HAC STS t DSC HIGH IMPEDANCE Figure 1. Converter Start Timing t t HSR ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD1674 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... AD1674 in the 20 V Span Span Input +20 V unipolar mode or – +10 V bipolar mode. When using IN the AD1674 in the 10 V Span The 12/8 pin determines whether the digital output data organized as two 8-bit words (12/8 LOW single 12-bit word (12/8 HIGH). ...
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... FREQUENCY-DOMAIN TESTING The AD1674 is tested dynamically using a sine wave input and a 2048 point Fast Fourier Transform (FFT) to analyze the resulting output. Coherent sampling is used, wherein the ADC sampling frequency and the analog input frequency are related to each other by a ratio of integers ...
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... The stand-alone mode is useful in systems with dedicated input ports available and thus not requiring full bus interface capability. Table truth table for the AD1674, and Figure 10 illus- trates the internal logic circuitry ...
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... ADC. The AD1674 is factory trimmed to minimize offset, linearity, and full-scale errors. In many applications, no calibration trim- ming will be required and the AD1674 will exhibit the accuracy limits listed in the specification tables. In some applications, offset and full-scale errors need to be trimmed out completely. The following sections describe the correct procedure for these various situations ...
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... Finally, power supplies should be decoupled in order to filter out ac noise. The AD1674 has a wide bandwidth sampling front end. This means that the AD1674 will “see” high frequency noise at the input, which nonsampling (or limited-bandwidth sampling) ADCs would ignore. Therefore, it’s important to make an effort to eliminate such high frequency noise through decoupling or by using an anti-aliasing filter at the analog input of the AD1674 ...
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... AD1674 GROUNDING If a single AD1674 is used with separate analog and digital ground planes, connect the analog ground plane to AGND and the digital ground plane to DGND keeping lead lengths as short as possible. Then connect AGND and DGND together at the AD1674. If multiple AD1674s are used or the AD1674 shares ...