AD2S80A Analog Devices, Inc., AD2S80A Datasheet
AD2S80A
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AD2S80A Summary of contents
Page 1
... Monolithic. A one chip solution reduces the package size required and increases the reliability. Resolution Set by User. Two control pins are used to select the resolution of the AD2S80A to be 10, 12, 14 bits allowing the user to use the AD2S80A with the optimum resolution for each application. ...
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... AD2S80A–SPECIFICATIONS Parameter SIGNAL INPUTS Frequency Voltage Level Input Bias Current Input Impedance Maximum Voltage REFERENCE INPUT Frequency Voltage Level Input Bias Current Input Impedance CONTROL DYNAMICS Repeatability Allowable Phase Shift Tracking Rate 1 Bandwidth ACCURACY Angular Accuracy Monotonicity Missing Codes (16-Bit Resolution) ...
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... RIPPLE CLK, DIR ± ± DB1–DB16 Only ± ± ± ± AD2S80A Typ Max Unit 150 300 ns 600 ns 1 LSTTL 3 LSTTL 3 LSTTL V 0.8 V µA 100 µA 100 1.0 V µA –400 V 0 ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD2S80A features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... DB14 20 21 DB13 DB12 LCC (E) Package – RIPPLE CLOCK 37 DIRECTION 36 BUSY 35 DATA LOAD AD2S80A 34 NC TOP VIEW 33 SC2 (Not to Scale) 32 SC1 31 DIGITAL GND INHIBIT PIN DESIGNATIONS ...
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... ANALOG S S CONVERTER RESOLUTION Two major areas of the AD2S80A specification can be selected and by the user to optimize the total system performance. The reso- L lution of the digital output is set by the logic state of the inputs SC1 and SC2 to be 10, 12, 14 bits; and the dynamic characteristics of bandwidth and tracking rate are selected by the choice of external components ...
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... LSB and the dynamic response will also change, since the dynamic characteristics are propor- tional to the signal level. The AD2S80A will not be damaged if the signal inputs are applied to the converter without the power supplies and/or the reference. REFERENCE INPUT The amplitude of the reference signal applied to the converter’ ...
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... The components should be connected as shown in Figure 1. PG compatible software is available to help users select the optimum component values for the AD2S80A, and display the transfer gain, phase and small step response. For more detailed information and explanation, see section “CIR- CUIT FUNCTIONS AND DYNAMIC PERFORMANCE.” ...
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... DB9 to DB16 (with the ENABLE input taken to a logic “LO”) regardless of the state of the BYTE SELECT pin. Note that when the AD2S80A is used with a resolution less than 16 bits the unused data lines are pulled to a logic “LO.” A logic “HI” on the BYTE SELECT input will present the eight most significant data bits on data output DB1 and DB8. A logic “ ...
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... DIRECTION VCO DIGITAL The ratio multiplier will work in exactly the same way whether the AD2S80A is connected as a tracking converter con- trol transformer, where data is preset into the counters using the DATA LOAD pin. HF Filter The AC ERROR OUTPUT may be fed to the PSD via a simple ac coupling network (R2, C1) to remove any dc offset at this point ...
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... Integrator The integrator components (R4, C4, R5, C5) are external to the AD2S80A to allow the user to determine the optimum dynamic characteristics for any given application. The section “COMPO- NENT SELECTION” explains how to select components for a chosen bandwidth. ...
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... AD2S80A –3 –6 –9 –12 0.04f 0.02f 0.1f 0.2f 0. FREQUENCY 180 135 –45 –90 –135 –180 0.4f 0.02f 0.04f 0.1f 0. FREQUENCY OUTPUT POSITION The small signal step response is shown in Figure 6. The time from the step to the first peak is t ...
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... This signal can be used to stabilize servo loops or in the place of a velocity transducer. Although the conversion loop of the AD2S80A includes a digital section there is an additional analog feedback loop around the velocity signal. This ensures against flicker in the digital posi- tional output in both dynamic and static states ...
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... R1 R2 RESOLVER TYPICAL CIRCUIT CONFIGURATION Figure 8 shows a typical circuit configuration for the AD2S80A in a 12-bit resolution mode. Values of the external components have been chosen for a reference frequency of 5 kHz and a maximum tracking rate of 260 rps with a bandwidth of 520 Hz. Placing the values for R4, R6, C4 and C5 in the equation for K gives a value of 1.67 × ...
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... INHIBIT BYTE SELECT ENABLE 15 26 DATA 16 25 OUTPUT LSB 10M 1M 100k 10k 24 20 –40 AD2S80A VELOCITY O 1.3nF C5 56k 6.8nF R5 R4 180k C6 100nF R7 68 470pF –12V 0V 100nF + 100 120 – TEMPERATURE – C ...
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... AC ERROR output as SIN ωt sin (θ–φ) or the DEMOD output as sin (θ–φ). To use the AD2S80A in this mode refer to the “Control Trans- former” application note. Dynamic Switching ...