AD5322 Analog Devices, AD5322 Datasheet

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AD5322

Manufacturer Part Number
AD5322
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD5322

Resolution (bits)
12bit
Dac Update Rate
125kSPS
Dac Settling Time
8µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
Ser,SPI

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FEATURES
AD5302: Two 8-bit buffered DACs in 1 package
AD5312: Two 10-bit buffered DACs in 1 package
AD5322: Two 12-bit buffered DACs in 1 package
10-lead MSOP
Micropower operation: 300 μA @ 5 V (including
Power-down to 200 nA @ 5 V, 50 nA @ 3 V
2.5 V to 5.5 V power supply
Double-buffered input logic
Guaranteed monotonic by design over all codes
Buffered/Unbuffered reference input options
0 V to V
Power-on-reset to 0 V
Simultaneous update of DAC outputs via LDAC
Low power serial interface with Schmitt-triggered inputs
On-chip rail-to-rail output buffer amplifiers
Qualified for automotive applications
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
reference current)
A version: ±1 LSB INL, B version: ±0.5 LSB INL
A version: ±4 LSB INL, B version: ±2 LSB INL
A version: ±16 LSB INL, B version: ±8 LSB INL
REF
output voltage
SYNC
SCLK
DIN
POWER-ON
RESET
LDAC
INTERFACE
LOGIC
REGISTER
REGISTER
INPUT
INPUT
FUNCTIONAL BLOCK DIAGRAM
2.5 V to 5.5 V, 230 μA, Dual Rail-to-Rail,
V
DD
REGISTER
REGISTER
DAC
DAC
Voltage Output 8-/10-/12-Bit DACs
Figure 1.
POWER-DOWN
STRING
V
STRING
V
REF
DAC
DAC
REF
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
GENERAL DESCRIPTION
The AD5302/AD5312/AD5322 are dual 8-, 10-, and 12-bit
buffered voltage output DACs in a 10-lead MSOP that operate
from a single 2.5 V to 5.5 V supply, consuming 230 μA at 3 V.
Their on-chip output amplifiers allow the outputs to swing rail-
to-rail with a slew rate of 0.7 V/μs. The AD5302/AD5312/AD5322
utilize a versatile 3-wire serial interface that operates at clock
rates up to 30 MHz and is compatible with standard SPI®,
QSPI™, MICROWIRE™, and DSP interface standards.
The references for the two DACs are derived from two reference
pins (one per DAC). The reference inputs can be configured as
buffered or unbuffered inputs. The outputs of both DACs can be
updated simultaneously using the asynchronous LDAC input.
The parts incorporate a power-on reset circuit, which ensures
that the DAC outputs power-up to 0 V and remain there until a
valid write takes place to the device. The parts contain a power-
down feature that reduces the current consumption of the
devices to 200 nA at 5 V (50 nA at 3 V) and provides software-
selectable output loads while in power-down mode.
The low power consumption of these parts in normal operation
makes them ideally suited for portable battery-operated
equipment. The power consumption is 1.5 mW at 5 V, 0.7 mW
at 3 V, reducing to 1 μW in power-down mode.
LOGIC
A
B
AD5302/AD5312/AD5322
BUFFER
BUFFER
AD5302/AD5312/AD5322
© 2006-2011 Analog Devices, Inc. All rights reserved.
GND
RESISTOR
NETWORK
NETWORK
RESISTOR
V
V
V
V
OUT
OUT
OUT
OUT
A
A
B
B
www.analog.com

Related parts for AD5322

AD5322 Summary of contents

Page 1

... V to 5.5 V supply, consuming 230 μ Their on-chip output amplifiers allow the outputs to swing rail- to-rail with a slew rate of 0.7 V/μs. The AD5302/AD5312/AD5322 utilize a versatile 3-wire serial interface that operates at clock rates MHz and is compatible with standard SPI®, QSPI™ ...

Page 2

... AD5302/AD5312/AD5322 to 80C51/80L51 Interface.......... 17   AD5302/AD5312/AD5322 to MICROWIRE Interface ........ 17   Applications Information .............................................................. 18   Typical Application Circuit....................................................... 18   Bipolar Operation Using the AD5302/AD5312/AD5322..... 18   Opto-Isolated Interface for Process Control Applications ... 19   Decoding Multiple AD5302/AD5312/AD5322s.................... 19   AD5302/AD5312/AD5322 as a Digitally Programmable   Window Detector ....................................................................... 19   ...

Page 3

... Rev Page AD5302/AD5312/AD5322 unless otherwise noted. MIN MAX Unit Test Conditions/Comments Bits LSB LSB Guaranteed monotonic by design over all codes Bits LSB LSB Guaranteed monotonic by design over all codes Bits LSB LSB Guaranteed monotonic by design over all codes ...

Page 4

... See Terminology section specifications tested with the outputs unloaded. 4 Linearity is tested using a reduced code range: AD5302 (Code 8 to 248); AD5312 (Code 28 to 995); AD5322 (Code 115 to 3981). 5 Guaranteed by design and characterization, not production tested order for the amplifier output to reach its minimum voltage, offset error must be negative. In order for the amplifier output to reach its maximum voltage, ...

Page 5

... DB0 Figure 2. Serial Interface Timing Diagram Rev Page AD5302/AD5312/AD5322 Conditions/Comments SCLK Cycle Time SCLK High Time SCLK Low Time SYNC to SCLK Active Edge Setup Time Data Setup Time Data Hold Time SCLK Falling Edge to SYNC Rising Edge ...

Page 6

... AD5302/AD5312/AD5322 OUTPUT IDEAL VOLTAGE ACTUAL POSITIVE OFFSET DAC CODE ERROR DEADBAND AMPLIFIER FOOTROOM (1mV) NEGATIVE OFFSET ERROR Figure 3. Transfer Function with Negative Offset GAIN ERROR OFFSET ERROR ACTUAL OUTPUT VOLTAGE IDEAL POSITIVE OFFSET ERROR DAC CODE Figure 4. Transfer Function with Positive Offset Rev ...

Page 7

... This is a stress rating only; functional operation of the device at these or any + 0.3 V other conditions above those indicated in the operational DD + 0.3 V section of this specification is not implied. Exposure to absolute DD maximum rating conditions for extended periods may affect + 0 device reliability. )/θ Rev Page AD5302/AD5312/AD5322 ...

Page 8

... GND Ground Reference Point for All Circuitry on the Part. LDAC GND 1 10 AD5302/ V DIN AD5312 SCLK 3 8 REF AD5322 V A SYNC 4 7 TOP VIEW REF (Not to Scale OUT OUT Figure 5. Pin Configuration in buffered mode buffered mode. ...

Page 9

... This is the glitch impulse transferred to the output of one DAC due to a change in the output of the other DAC measured by loading one of the input registers with a full-scale code AD5302/AD5312/AD5322 change (all 0s to all 1s and vice versa) while keeping LDAC high, then pulsing LDAC low, and monitoring the output of the DAC whose digital code is not changed ...

Page 10

... Figure 9. AD5302 Typical DNL Plot 0 25° 0.4 0.2 0 –0.2 –0.4 –0.6 0 200 400 600 CODE Figure 10. AD5312 Typical DNL Plot 1 25° 0.5 0 –0.5 –1.0 0 1000 2000 3000 CODE Figure 11. AD5322 Typical DNL Plot 200 250 800 1000 4000 ...

Page 11

... Figure 15. I REF –0 80 120 0 600 500 400 300 200 100 0 ZERO SCALE 80 120 Rev Page AD5302/AD5312/AD5322 150 200 250 300 350 I (µA) DD Histogram with and SOURCE 3V SOURCE 3V SINK 5V SINK 1 ...

Page 12

... AD5302/AD5312/AD5322 600 BOTH DACS IN GAIN-OF-TWO MODE REFERENCE INPUTS BUFFERED 500 400 –40°C 300 +105°C 200 100 0 2.5 3.0 3.5 4.0 V (V) DD Figure 18. Supply Current vs. Supply Voltage 1.0 BOTH DACS IN THREE-STATE CONDITION 0.8 0.6 0.4 +25°C 0.2 0 2.7 3.2 3.7 4.2 V (V) DD Figure 19. Power-Down Current vs. Supply Voltage 700 T = 25°C ...

Page 13

... Figure 24. AD5322 Major-Code Transition 10 0 –10 –20 –30 –40 –50 –60 10 100 1k 10k 100k FREQUENCY(Hz) Figure 25. Multiplying Bandwidth (Small-Signal Frequency Response) 1 0.5 0 –0.5 –1 10M Rev Page AD5302/AD5312/AD5322 500ns/DIV Figure 26. DAC-to-DAC Crosstalk 25° ...

Page 14

... The slew rate is 0.7 V/μs with a half-scale settling time OUT ±0.5 LSB (at eight bits μs. See Figure 21. OUTPUT BUFFER AMPLIFIER POWER-ON RESET The AD5302/AD5312/AD5322 are provided with a power-on reset function to power them defined state. The power- on state is • Normal operation • Reference inputs unbuffered • ...

Page 15

... Figure 32. AD5322 Input Shift Register Contents The remaining bits are DAC data bits, starting with the MSB and ending with the LSB. The AD5322 uses all 12 bits of DAC data, the AD5312 uses 10 bits and ignores the 2 LSB. The AD5302 uses eight bits and ignores the last four bits. The data format is straight binary, with all 0s corresponding output, and all 1s corresponding to full-scale output (VREF – ...

Page 16

... AD5302/AD5312/AD5322 POWER-DOWN MODES The AD5302/AD5312/AD5322 have very low power consump- tion, dissipating only 0.7 mW with supply and 1.5 mW with supply. Power consumption can be further reduced when the DACs are not in use by putting them into one of three power-down modes, which are selected by Bit 13 and Bit 12 (PD1 and PD0) of the control word ...

Page 17

... Figure 36. AD5302/AD5312/AD5322 to 80C51/80L51 Interface AD5302/AD5312/AD5322 TO MICROWIRE INTERFACE Figure 37 shows an interface between the AD5302/AD5312/ AD5322 and any MICROWIRE-compatible device. Serial data is shifted out on the falling edge of the serial clock and is clocked into the AD5302/AD5312/AD5322 on the rising edge of the SK. Figure 37. AD5302/AD5312/AD5322 to MICROWIRE Interface AD5302/ AD5312/ AD5322 1 Rev ...

Page 18

... AD5302/AD5312/AD5322 APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT The AD5302/AD5312/AD5322 can be used with a wide range of reference voltages, especially if the reference inputs are configured to be unbuffered, in which case the devices offer full, one-quadrant multiplying capability over a reference range More typically, the AD5302/AD5312/AD5322 can DD be used with a fixed, precision reference voltage ...

Page 19

... GND Figure 41. AD5302/AD5312/AD5322 in an Opto-Isolated Interface DECODING MULTIPLE AD5302/AD5312/AD5322s The SYNC pin on the AD5302/AD5312/AD5322 can be used in applications to decode a number of DACs. In this application, all the DACs in the system receive the same serial clock and serial data, but only the SYNC to one of the devices is active at any one time, allowing access to two channels in this eight-channel system ...

Page 20

... AD5302/AD5312/ –3 , giving DAC B a AD5322. The part should have ample supply bypassing of 10 μF in parallel with 0.1 μF on the supply located as close as possible to the package, ideally right up against the device. The 10 μF capacitors are the tantalum bead type. The 0.1 μF capacitor ...

Page 21

... OUTLINE DIMENSIONS IDENTIFIER 3.10 3.00 2.90 5. 3.10 4.90 3.00 4.65 1 2.90 5 PIN 1 0.50 BSC 0.95 15° MAX 0.85 1.10 MAX 0.75 0.15 0.23 6° 0.30 0.05 0.13 0° 0.15 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure 45. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters Rev Page AD5302/AD5312/AD5322 0.70 0.55 0.40 ...

Page 22

... AD5322ARMZ −40°C to +105°C AD5322ARMZ-REEL7 −40°C to +105°C AD5322BRM −40°C to +105°C AD5322BRM-REEL −40°C to +105°C AD5322BRM-REEL7 −40°C to +105°C AD5322BRMZ −40°C to +105°C AD5322BRMZ-REEL −40°C to +105°C AD5322BRMZ-REEL7 −40°C to +105°C AD5312WARMZ-REEL7 − ...

Page 23

... NOTES AD5302/AD5312/AD5322 Rev Page ...

Page 24

... AD5302/AD5312/AD5322 NOTES ©2006-2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00928-0-5/11(D) Rev Page ...

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