AD678 Analog Devices, AD678 Datasheet
AD678
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AD678 Summary of contents
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... The AD678 operates from +5 V and ±12 V supplies and dissipates 560 mW (typ). The AD678 is available in 28-lead plastic DIP, ceramic DIP, and 44-lead J-leaded ceramic surface mount packages. ...
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... –2– 10 200 kSPS, SAMPLE AD678K/B/T Max Min Typ Max –80 –88 –80 0.010 0.004 0.010 –80 –87 –80 1 500 –80 –85 –80 –80 –90 –80 = – ...
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... AD678 Units °C °C °C Bits LSB Bits LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB V V MΩ pF µ ...
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... AD678 (All grades, T TIMING SPECIFICATIONS otherwise noted) Parameter SC Delay Conversion Time l Conversion Rate Convert Pulsewidth Aperture Delay Status Delay 2, 3 Access Time 5 Float Delay Output Delay Format Setup OE Delay Read Pulsewidth Conversion Delay EOCEN Delay NOTES 1 Includes acquisition time. 2 Measured from the falling edge of OE/EOCEN (0 the time at which the data lines/EOC cross 2 0.8 V. See Figure 3. ...
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... ESD SENSITIVITY The AD678 features input protection circuitry consisting of large “distributed” diodes and polysilicon series resistors to dissipate both high energy discharges (Human Body Model) and fast, low energy pulses (Charged Device Model). Per Method 3015.2 of MIL-STD-883C, the AD678 has been classified as a Category 1 device ...
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... JLCC PACKAGE PIN DB10 IDENTIFIER DB9 9 AIN 36 DB8 10 AD678 11 35 DB7 TOP VIEW 34 DB6 12 OUT DB5 DB4 DB3 ...
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... At this point, the amplitude of the reconstructed fundamental has degraded by less than 0.1 dB. Beyond this frequency, distor- tion of the sampled input signal increases significantly. The AD678 has been designed to optimize input bandwidth, al- lowing the AD678 to undersample input signals with frequen- cies significantly above the converter’s Nyquist frequency. ...
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... AD678–Dynamic Performance Figure 4. Harmonic Distortion vs. Input Frequency Figure 5. S/N+D vs. Input Amplitude (f 200 kSPS) SAMPLE Figure 6. S/N+D vs. Input Frequency and Amplitude Figure 7. Nonaveraged 2048 Point FFT at 200 kSPS 49.902 kHz IN Figure 8. IMD Plot for f = 9.08 kHz (fa), 9.58 kHz (fb) IN Figure 9. Power Supply Rejection (f ...
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... In track mode, the sample-hold will settle to ± 0.01% (12 bits µs maximum. The acquisition time does not affect the throughput rate as the AD678 goes back into track mode more than 1 µs before the next conversion. In multichannel systems, the input channel can be switched as soon as EOC goes LOW if the maximum throughput rate is needed ...
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... LSB) and ± 0.5% of gain trim range (20 LSB). Either or both of the trim pots can be replaced with 50 Ω ± 1% fixed resistors if the AD678 accuracy limits are sufficient for the application. If the pins are shorted together, the additional offset and gain errors will be approximately 1%. ...
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... DGND keeping lead lengths as short as possible. Then connect AGND and DGND together at the AD678. If multiple AD678s are used or the AD678 shares ana- log supplies with other components, connect the analog and digital returns together once at the power supplies rather than at each chip ...
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... AD678 data memory interface with three hardware wait states. The converter is configured to run asynchronously using a sam- pling clock. The EOC output of the AD678 gets asserted at the end of each conversion and causes an interrupt. Upon interrupt, the ADSP-2100A immediately executes a data memory write instruction which asserts HBE ...
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... REV. C OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Lead Ceramic DIP Package (D-28) 28-Lead Plastic DIP Package (N-28A) –13– AD678 ...
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... AD678 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 44-Terminal Lead Ceramic (J-44) –14– REV. C ...