AD698 Analog Devices, AD698 Datasheet

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AD698

Manufacturer Part Number
AD698
Description
Universal LVDT Signal Conditioner
Manufacturer
Analog Devices
Datasheet

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PRODUCT DESCRIPTION
The AD698 is a complete, monolithic Linear Variable Differen-
tial Transformer (LVDT) signal conditioning subsystem. It is
used in conjunction with LVDTs to convert transducer mechan-
ical position to a unipolar or bipolar dc voltage with a high de-
gree of accuracy and repeatability. All circuit functions are
included on the chip. With the addition of a few external passive
components to set frequency and gain, the AD698 converts the
raw LVDT output to a scaled dc signal. The device will operate
with half-bridge LVDTs, LVDTs connected in the series op-
posed configuration (4-wire), and RVDTs.
The AD698 contains a low distortion sine wave oscillator to
drive the LVDT primary. Two synchronous demodulation
channels of the AD698 are used to detect primary and second-
ary amplitude. The part divides the output of the secondary by
the amplitude of the primary and multiplies by a scale factor.
This eliminates scale factor errors due to drift in the amplitude
of the primary drive, improving temperature performance and
stability.
The AD698 uses a unique ratiometric architecture to eliminate
several of the disadvantages associated with traditional ap-
proaches to LVDT interfacing. The benefits of this new cir-
cuit are: no adjustments are necessary; temperature stability is
improved; and transducer interchangeability is improved.
The AD698 is available in two performance grades:
Grade
AD698AP
AD698SQ
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
Single Chip Solution, Contains Internal Oscillator and
No Adjustments Required
Interfaces to Half-Bridge, 4-Wire LVDT
DC Output Proportional to Position
20 Hz to 20 kHz Frequency Range
Unipolar or Bipolar Output
Will Also Decode AC Bridge Signals
Outstanding Performance
Voltage Reference
Linearity: 0.05%
Output Voltage:
Gain Drift: 20 ppm/ C (typ)
Offset Drift: 5 ppm/ C (typ)
Temperature Range
–40 C to +85 C
–55 C to +125 C
11 V
Package
28-Pin PLCC
24-Pin Cerdip
PRODUCT HIGHLIGHTS
1. The AD698 offers a single chip solution to LVDT signal
2. The AD698 can be used with many different types of posi-
3. The 20 Hz to 20 kHz excitation frequency is determined by a
4. Changes in oscillator amplitude with temperature will not af-
5. Multiple LVDTs can be driven by a single AD698 either in
6. The AD698 may be used as a loop integrator in the design of
7. The sum of the transducer secondary voltages do not need to
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
conditioning problems. All active circuits are on the mono-
lithic chip with only passive components required to com-
plete the conversion from mechanical position to dc voltage.
tion sensors. The circuit is optimized for use with any
LVDT, including half-bridge and series opposed, (4 wire)
configurations. The AD698 accommodates a wide range of
input and output voltages and frequencies.
single external capacitor. The AD698 provides up to 24 volts
rms to differentially drive the LVDT primary, and the
AD698 meets its specifications with input levels as low as
100 millivolts rms.
fect overall circuit performance. The AD698 computes the
ratio of the secondary voltage to the primary voltage to deter-
mine position and direction. No adjustments are required.
series or parallel as long as power dissipation limits are not
exceeded. The excitation output is thermally protected.
simple electromechanical servo loops.
be constant.
FUNCTIONAL BLOCK DIAGRAM
LVDT Signal Conditioner
B
A
AMP
OSCILLATOR
A
B
© Analog Devices, Inc., 1995
FILTER
AD698
REFERENCE
Universal
VOLTAGE
AD698
Fax: 617/326-8703
AMP

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AD698 Summary of contents

Page 1

... Multiple LVDTs can be driven by a single AD698 either in series or parallel as long as power dissipation limits are not exceeded. The excitation output is thermally protected. 6. The AD698 may be used as a loop integrator in the design of simple electromechanical servo loops. 7. The sum of the transducer secondary voltages do not need to Package be constant ...

Page 2

... AD698AP Min Typ Max Unit R2 V 0.4 1. 500 ppm of FS 0.1 1 100 ppm 0. ppm 100 ppm/dB ...

Page 3

... Storage Temperature Range P Package . . . . . . . . . . . . . . . . . . . . . . . . . – +150 C Q Package . . . . . . . . . . . . . . . . . . . . . . . . – +150 C Operating Temperature Range AD698SQ . . . . . . . . . . . . . . . . . . . . . . . . – +125 C AD698AP . . . . . . . . . . . . . . . . . . . . . . . . . – +85 C Lead Temperature Range (Soldering 60 sec +300 C Power Dissipation Derates above + Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 mW Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 mW/ C THERMAL CHARACTERISTICS ...

Page 4

... AD698 Typical Characteristics (at +25 C and V 240 200 160 GAIN PSRR 15–18V 120 80 40 GAIN PSRR 12–15V 20 OFFSET PSRR 12–15V 0 OFFSET PSRR 15–18V –20 –60 –40 – TEMPERATURE – C Figure 1. Gain and Offset PSRR vs. Temperature 0 OFFSET CMRR –05 –10 –15 – ...

Page 5

... The AD698 energizes the LVDT coil, senses the LVDT output voltages and produces a dc output voltage proportional to core position. The AD698 has a sine wave oscillator and power am- plifier to drive the LVDT. Two synchronous demodulation stages are available for decoding the primary and secondary voltages ...

Page 6

... AD698 CONNECTING THE AD698 The AD698 can easily be connected for dual or single supply operation as shown in Figures 7, 8 and 13. The following gen- eral design procedures demonstrate how external component values are selected and can be used for any LVDT that meets AD698 input/output criteria. The connections for the A and B channels and the A channel comparators will depend on which transducer is used ...

Page 7

... Farad Hz/250 Hz = 0.4 F See Figures 14, 15 and 16 for more information about AD698 bandwidth and phase characterization. D. Set the Full-Scale Output Voltage 8. To compute R2, which sets the AD698 gain or full-scale output range, several pieces of information are needed: a. LVDT sensitivity, S REV Full-scale core displacement from null, d ...

Page 8

... SIGNAL to respond once the core is moved. The dynamics arise prima- REFERENCE rily from the interface electronics. Figures 14, 15 and 16 show the frequency response of the AD698 LVDT Signal Conditioner Note that Figures 15 and 16 are basically the same; the differ- OUT 19 ence is frequency range covered ...

Page 9

... The figures are transfer functions with the input to be 0.033µF considered as a sinusoidally varying mechanical position and the output as the voltage from the AD698; the units of the transfer function are volts per inch. The value of C2, C3, and C4, from 0.01µF Figure 7, are all equal and designated as a parameter in the fig- ures ...

Page 10

... V by the gain stage created by A1 provide a differential in- A 1.71V rms put to the A Channel of the AD698. The signal is then synchro- nously detected by A Channel. The B Channel is used to detect the level of the bridge excitation. The ratio of A/B is then calcu- 0.99V rms lated and converted to an output voltage by R2 ...

Page 11

... The other components, C1, C2, C3, C4 may be selected by following the guidelines on general device operation men- tioned earlier gain trim is required, then a trim resistor can be used to ad- just either network on the OFFSET 1 and OFFSET 2 pins of the AD698. 6.8µF 100nF 100nF –V ...

Page 12

... AD698 0.005 (0.13) MIN PIN 1 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.048 (1.21) 0.042 (1.07) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 24-Pin Cerdip (Wide) 0.098 (2.49) MAX 24 13 0.610 (15.5) 0.520 (13. 1.280 (32.51) MAX 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN SEATING 0.100 0.070 (1.78) PLANE (2.54) 0.030 (0.76) BSC 28-Pin PLCC ...

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