AD7302 Analog Devices, AD7302 Datasheet
AD7302
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AD7302 Summary of contents
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... Programmable Voltage and Current Sources Programmable Attenuators GENERAL DESCRIPTION The AD7302 is a dual, 8-bit voltage out DAC that operates from a single +2 +5.5 V supply. Its on-chip precision output buffers allow the DAC outputs to swing rail to rail. The AD7302 has a parallel microprocessor and DSP-compatible interface with high speed registers and double buffered interface logic ...
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... AD7302–SPECIFICATIONS Parameter STATIC PERFORMANCE Resolution Relative Accuracy Differential Nonlinearity Full-Scale Error Zero Code Error @ Gain Error Zero Code Temperature Coefficient DAC REFERENCE INPUT REFIN Input Range REFIN Input Impedance OUTPUT CHARACTERISTICS Output Voltage Range Output Voltage Settling Time Slew Rate ...
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... AD7302 /2 Reference; DD Conditions/Comments Address to Write Setup Time Address Valid to Write Hold Time Chip Select to Write Setup Time Chip Select to Write Hold Time Write Pulse Width Data Setup Time Data Hold Time Write to LDAC Setup Time ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7302 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... Pin No. Mnemonic Function Parallel Data Inputs. Eight-bit data is loaded to the input register of the AD7302 under the control of CS 1-8 D7–D0 and WR Chip Select. Active low logic input. WR Write Input active low logic input used in conjunction with CS and A/B to write data to the selected 10 DAC register ...
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... AD7302 TERMINOLOGY INTEGRAL NONLINEARITY For the DACs, relative accuracy or endpoint nonlinearity is a measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. A graphical representation of the transfer curve is shown in Figure 14. DIFFERENTIAL NONLINEARITY Differential Nonlinearity is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes ...
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... LOGIC INPUTS = V DD 1.0 2.5 3.0 3.5 4.0 100 125 V – Volts DD Figure 7. Typical Supply Current vs. Supply Voltage OUT 1 AD7302 POWER-UP TIME INTERNAL REFERENCE DAC IN POWER-DOWN INITIALLY CH1 = 2V/div, CH2 = 5V/Div, TIME BASE = 2 µs/Div Figure 10. Exiting Power-Down (Full Power-Down GND 4.5 5.0 5.5 ...
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... AD7302 CH1 M20.0ms 5.00V CH2 5.00V CH1 CH3 5.00V Figure 11. Power-On—RESET 0 0.4 INTERNAL REFERENCE 5k 100pf. LOAD 0.3 LIMITED CODE RANGE (10–245 + 0.2 DAC A 0.1 0 –0.1 DAC B –0.2 –0.3 –0.4 –0 128 160 192 224 ...
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... the decimal equivalent of the code loaded to the DAC register and ranges from 0 to 255. Reference The AD7302 has the facility to use either an external reference applied through the REFIN pin or an internal reference generated from V . Figure 20 shows the reference input DD arrangement where either the internal V externally applied reference can be selected ...
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... Figure 24. Timing and Register Arrangement for Simulta- neous Update Mode POWER-ON RESET The AD7302 has a power-on reset circuit designed to allow output stability during power-up. This circuit holds the DACs in a reset state until a write takes place to the DAC. In the reset state all zeros are latched into the input registers of each DAC ...
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... CODE Figure 26. DAC Transfer Function Figure 27 shows a typical setup for the AD7302 when using its internal reference. The internal reference is selected by tying the REFIN pin Internally in the reference section there reference detect circuit that will select the internal V on the voltage connected to the REFIN pin ...
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... In the circuit shown the LDAC is hardwired low, thus the selected DAC output is updated on the rising edge of WR. Some applications may require simultaneous updating of both DACs in the AD7302. In this case the LDAC signal can be driven from an external timer or can be controlled by the microprocessor. One option for simultaneous updating is to ...
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... DD Figure 32. Bipolar Operation Using the AD7302 Decoding Multiple AD7302 in a System The CS pin on the AD7302 can be used in applications to decode a number of DACs. In this application all DACs in the system receive the same input data, but only the CS to one of the DACs will be active at any one time allowing access to two channels in the system ...
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... The power supply lines of the AD7302 should use as large a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching sig- ...
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... PLANE BSC 0.0091 (0.23) 20-Lead TSSOP (RU-20) 0.260 (6.60) 0.252 (6.40 PIN 1 0.0433 (1.10) MAX 0.0256 (0.65) 0.0118 (0.30) 0.0079 (0.20) BSC 0.0075 (0.19) PLANE 0.0035 (0.090) –15– AD7302 0.325 (8.25) 0.195 (4.95) 0.300 (7.62) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) 0.0291 (0.74 0.0098 (0.25) 0.0500 (1.27 0.0157 (0.40) 0.028 (0.70 0.020 (0.50) ...
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