AD7824 Analog Devices, AD7824 Datasheet
AD7824
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AD7824 Summary of contents
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... The AD7824 and AD7828 operate from a single 5 V supply and have an analog input range using an external 5 V reference. ...
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... AD7824/AD7828–SPECIFICATIONS noted. All specifications unless otherwise noted. Specifications apply for Mode 0.) MIN MAX Parameter K Version ACCURACY Resolution 8 ± Total Unadjusted Error Minimum Resolution for which No Missing Codes Are Guaranteed 8 ± 1/4 Channel-to-Channel Mismatch REFERENCE INPUT Input Resistance 1.0/4.0 V (+) Input Voltage Range ...
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... U Grades 2.8 120 70 70 100 70 600 80 400 AD7824/AD7828 Unit Conditions/Comments Setup Time ns min Hold Time ns min ns min Multiplexer Address Setup Time ns min Multiplexer Address Hold Time CS to RDY Delay. Pull-Up ns max Resistor 5 kΩ. µs max Conversion Time, Mode 0 ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Model AD7824KN AD7824LN AD7824KR AD7824BQ AD7824CQ AD7824TQ AD7824UQ AD7828KN AD7828LN AD7828KP AD7828LP AD7828BQ ...
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... Typical Performance Characteristics–AD7824/AD7828 ...
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... AD7824/AD7828 OPERATIONAL DIAGRAM The AD7824 is a 4-channel 8-bit A/D converter and the AD7828 is an 8-channel 8-bit A/D converter. Operational dia- grams for both of these devices are shown in Figures 3 and 4. The addition of just reference allows the devices to perform the analog-to-digital function. CIRCUIT INFORMATION ...
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... Suitable op amps for driving the AD7824/AD7828 are the AD544 or AD644. AD7824/AD7828 INHERENT SAMPLE-HOLD A major benefit of the AD7824’s and AD7828’s analog input structure is its ability to measure a variety of high-speed signals without the help of an external sample-and-hold conven- tional SAR type converter, regardless of its speed, the input must remain stable to at least 1/2 LSB throughout the conver- sion process if rated accuracy maintained ...
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... AD7824/AD7828 UNIPOLAR OPERATION The analog input range for any channel of the AD7824/ AD7828 shown in the unipolar operational diagram of Fig- ure 10. Figure 11 shows the designed code transitions which occur midway between successive integer LSB values (i.e., 1/2 LSB, 3/2 LSB, 5/2 LSB, FS 3/2 LSBs). The output code is Natural Binary with 1 LSB = FS/256 = (5/256 ...
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... The data bus (DB7–DB0) remains in the three-state condition until conversion is complete. There are two converter status outputs on the AD7824/AD7828, interrupt (INT) and ready (RDY) which can be used to drive the microprocessor READY/ WAIT input. The RDY is an open drain output (no internal ...
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... The microprocessor then places the conversion results in the D0 register. TMS32010 MICROCOMPUTER A TMS32010 interface is shown in Figure 18. The AD7824/ AD7828 is operating in Mode 1 (i.e., no µP WAIT states). The ADC is mapped at a port address. The following I/O instruction starts a conversion and reads the previous conversion result into the accumulator ...
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... PLASTIC LEADS WILL BE EITHER SOLDER DIPPED OR TIN/LEAD PLATED AD7824/AD7828 SAMPLE +5V +15V PULSE REF INT AD7226 DB7 DB7 V OUT V DB0 DB0 OUT V AD7824 OUT (+) OUT REF A0 A0 (–) DGND REF V AGND SS 24-Lead Small Outline Package (R-24) 0.6141 (15.60) 0.5985 (15.20) 13 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 12 0.3937 (10.00) 0.1043 (2.65) ...
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... AD7824/AD7828 28-Lead Cerdip (Q-28) 1.490 (37.84) MAX 28 15 0.525 (13.33) 0.515 (13.08) PIN GLASS SEALANT 0.22 (5.59) MAX 0.125 (3.175) MIN 0.11 (2.79) 0.02 (0.5) 0.06 (1.52) SEATING PLANE 0.099 (2.28) 0.016 (0.406) 0.05 (1.27) LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH CERDIP LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS 28-Lead Small Outline Package (R-28) ...