adf4206 Analog Devices, Inc., adf4206 Datasheet

adf4206

Manufacturer Part Number

adf4206

Description

Dual Rf Pll Frequency Synthesizers

Manufacturer

Analog Devices, Inc.

Datasheet

1.ADF4206.pdf (24 pages)

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FEATURES

ADF4206: 550 MHz/550 MHz

ADF4208: 2.0 GHz/1.1 GHz

2.7 V to 5.5 V power supply

Selectable charge pump supply (V

Selectable charge pump currents

On-chip oscillator circuit

Selectable dual modulus prescaler

3-wire serial interface

Power-down mode

APPLICATIONS

Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)

Base stations for wireless radio (GSM, PCS, DCS,

Wireless LANS

Communications test equipment

CATV equipment

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

tuning voltage in 3 V systems

RF2: 32/33 or 64/65

RF1: 32/33 or 64/65

CDMA, WCDMA)

OSC

RF2

RF1

OSC

DATA

CLK

OUT

) allows extended

OSCILLATOR

22-BIT

DATA

N = BP + A

PRESCALER

RF2

RF1

SDOUT

FUNCTIONAL BLOCK DIAGRAM

DGND

RF1

Dual RF PLL Frequency Synthesizers

B-COUNTER

A-COUNTER

B-COUNTER

11-BIT RF2

A-COUNTER

11-BIT RF1

AGND

6-BIT RF2

6-BIT RF1

R-COUNTER

14-BIT RF1

14-BIT RF2

RF1

Figure 1.

DGND

RF2

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

GENERAL DESCRIPTION

The ADF420x family of dual frequency synthesizers are used

to implement local oscillators in the upconversion and down-

conversion sections of wireless receivers and transmitters. Each

synthesizer consists of a low noise, digital, phase frequency detector

(PFD); a precision charge pump; a programmable reference

divider; programmable A and B counters; and a dual modulus

prescaler (P/P + 1). The A (6-bit) and B (11-bit) counters, in

conjunction with the dual modulus prescaler (P/P + 1), implement

an N divider (N = BP + A). In addition, the 14-bit reference

counter (R counter) allows selectable REFIN frequencies at the

PFD input. The on-chip oscillator circuitry allows the reference

input to be derived from crystal oscillators.

A complete phase-locked loop (PLL) can be implemented if the

synthesizers are used with an external loop filter and voltage

controlled oscillators (VCOs).

Control of all the on-chip registers is via a simple 3-wire

interface. The devices operate with a power supply ranging

from 2.7 V to 5.5 V and can be powered down when not in use.

COMPARATOR

AGND

PHASE

RF2

OUTPUT

DETECT

LOCK

ADF4206/ADF4208

MUX

RF2

RF1

CHARGE

PUMP

ADF4206/ADF4208

MUXOUT

RF2

RF1

www.analog.com

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