ADP3209 ON Semiconductor, ADP3209 Datasheet

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ADP3209

Manufacturer Part Number
ADP3209
Description
5-bit, Programmable, Single-phase, Synchronous Buck Controller
Manufacturer
ON Semiconductor
Datasheet

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FEATURES
Single-chip solution
±8 mV worst-case differentially sensed core voltage error
Automatic power-saving modes maximize efficiency during
Soft transient control reduces inrush current and audio noise
Independent current limit and load line setting inputs for
Built-in power-good masking supports
5-bit, digitally programmable DAC with 0.4 V to 1.25 V output
Short-circuit protection with programmable latch-off delay
Output power or current monitor options
32-lead LFCSP
APPLICATIONS
Notebook power supplies for next-generation Intel chipsets
©2008 SCILLC. All rights reserved.
January 2008 – Rev. 2
regulator specifications
over temperature
light load operation
additional design flexibility
voltage identification (VID) on-the-fly transients
Fully compatible with the Intel® GMCH chipset voltage
Integrated MOSFET drivers
VARFREQ
PWRGD
GND
VID4
VID3
VID2
VID1
VID0
VCC
EN
ST
SS
ADP3209
RAMP
FBRTN
UVLO
VREF
DAC
GENER-
VID
RAMP
ATOR
FUNCTIONAL BLOCK DIAGRAM
VRPM RPM
VDAC
KEEPING
HOUSE-
REFTH
REF
CMPS
PWM
VREF
REFERENCE
SWITCH
AMPS
SELECT
OSCILLATOR
5-Bit, Programmable, Single-Phase,
CLREF
CLTHSEL
CONTROL
BIAS
BIAS
RT
LATCH
PHASE
PWM
Figure 1.
PMON
CLIM
CMP
PMON
GENERAL DESCRIPTION
The ADP3209 is a highly efficient, single-phase, synchronous
buck switching regulator controller. With its integrated drivers,
the ADP3209 is optimized for converting the notebook battery
voltage to render the supply voltage required by high performance
Intel chipsets. An internal 5-bit DAC is used to read a VID code
directly from the chipset and to set the GMCH core voltage to a
value within the range of 0.4 V to 1.25 V.
The ADP3209 uses a multimode architecture. It provides program-
mable switching frequency that can be optimized for efficiency
depending on the output current requirement. In addition, the
ADP3209 includes a programmable load line slope function to
adjust the output voltage as a function of the load current so that
the core voltage is always optimally positioned for a load transient.
The ADP3209 also provides accurate and reliable current overload
protection and a delayed power-good output. The IC supports
on-the-fly output voltage changes requested by the chipset.
The ADP3209 is specified over the extended commercial tempera-
ture range of 0°C to 100°C and is available in a 32-lead LFCSP.
PWM
ERR AMP
CSAMP
Synchronous Buck Controller
+
PMONFS
IN
ODB
ODA
DRV
+
– +
+
+
+
+
CSAVG
SS
+
+
BST
DRVH
SW
PVCC
DRVL
PGND
COMP
LLINE
CSFB
CSREF
CSCOMP
CLIM
FBRTN
FB
Publication Order Number:
ADP3209
ADP3209/D

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ADP3209 Summary of contents

Page 1

... The ADP3209 also provides accurate and reliable current overload protection and a delayed power-good output. The IC supports on-the-fly output voltage changes requested by the chipset. The ADP3209 is specified over the extended commercial tempera- ture range of 0°C to 100°C and is available in a 32-lead LFCSP. FUNCTIONAL BLOCK DIAGRAM ...

Page 2

... Ramp Resistor Selection ............................................................27 COMP Pin Ramp ........................................................................27 Current Limit Setpoint...............................................................27 Power Monitor ............................................................................27 Feedback Loop Compensation Design ....................................27 C Selection and Input Current di/dt Reduction ..................29 IN Soft Transient Setting .................................................................29 Tuning Procedure for ADP3209 ...............................................29 Layout and Component Placement..........................................30 Outline Dimension .........................................................................32 Ordering Guide ...........................................................................32 Rev Page www.onsemi.com ...

Page 3

... EN = low or in UVLO, RAMP = CSFB − CSREF OS(CSA) I BIAS(CSFB) GBW (CSA CSCOMP CSFB and CSREF V CSCOMP I Sink current CSCOMP Source current Rev Page www.onsemi.com ADP3209 1 Current entering a pin (sunk by Min Typ Max Unit 0.8 3.6 V 1.6 V − ...

Page 4

... ADP3209 Parameter SWITCH AMPLIFIER 2 Common-Mode Range Input Resistance Input Current Zero Current Switching Threshold DCM Minimum Off Time Masking CURRENT LIMIT COMPARATOR 2 Output Voltage Range Output Current Current Limit Threshold Voltage Current Limit Setting Ratio SOFT START/LATCH-OFF TIMER Output Current Termination Threshold Voltage ...

Page 5

... Figure 2 DRVL L t BST − 4.6 V TO(SW low, shutdown EN = high, no switching EN = low or latch off V CC Normal mode VCC rising CCOK V VCC falling CCUVLO Rev Page www.onsemi.com ADP3209 Min Typ Max Unit 1.6 3.3 Ω 1.3 2.8 Ω μ ...

Page 6

... ADP3209 TIMING DIAGRAM Timing is referenced to the 90% and 10% points, unless otherwise noted. IN tpdl DRVL DRVL DRVH (WITH RESPECT TO SW DRVL tpdh tr DRVH DRVH V TH Figure 2. Timing Diagram Rev Page www.onsemi.com tpdl tr DRVH DRVL tf DRVH V TH tpdh DRVL 1V ...

Page 7

... V to +20 V − +25 V ESD CAUTION −0 − −0 +20 V −0 +25 V −0 −65°C to +150°C 0°C to 100°C 125°C 32.6°C/W 300°C 260°C Rev Page www.onsemi.com ADP3209 ...

Page 8

... DRVL Low-Side Gate Drive Output. 20 PVCC Power Supply Input/Output of Low-Side Gate Driver. FBRTN 1 24 VCC PIN BST INDICATOR COMP 3 22 DRVH ADP3209 TOP VIEW 20 PVCC (Not to Scale) PMON 6 19 DRVL PMONFS 7 18 PGND CLIM 8 17 GND Figure 3 ...

Page 9

... Power-Good Output. Open-drain output. A low logic state means that the output voltage is outside of the VID DAC defined range. 32 Variable Frequency Enable Input. Pulling this pin to ground sets the normal RPM mode of operation. VARFREQ Pulling this pin sets the fixed-frequency PWM mode of operation. Rev Page www.onsemi.com ADP3209 ...

Page 10

... ADP3209 TYPICAL PERFORMANCE CHARACTERISTICS 20°C to 100°C, unless otherwise noted. VID 12V 19V LOAD CURRENT (A) Figure 4. PWM Mode Efficiency vs. Load Current 12V LOAD CURRENT (A) Figure 5 ...

Page 11

... IN CH1 5.00V 6 CH3 5.00A 4 SWITCH NODE 2 1 800mV CH1 100mV Figure 15. Load Transient Rev Page www.onsemi.com ADP3209 OUTPUT VOLTAGE SWITCH NODE INDUCTOR CURRENT LOW-SIDE GATE DRIVE CH2 5.00V M400ns A CH3 4.00A CH4 20.0mV~ T 10.00% Figure 13. DCM Waveforms Load Current ...

Page 12

... ADP3209 4 OUTPUT VOLTAGE SWITCH NODE 2 LOAD CURRENT 1 CH1 100mV CH2 10.0V~ M2.00μs CH4 20.0mV T 20.00% Figure 16. Load Transient OUTPUT VOLTAGE VID 0 1 CH1 1.00V M40.0μs CH4 100mV T 20.00% Figure 17. VID on the Fly, 1. 0.825 CH1 120mV = 19 V Figure 18. Output Ripple Load, C ...

Page 13

... OPERATION MODES The ADP3209 runs in RPM mode for the purpose of fast transient response and high light load efficiency. During the following transients, the ADP3209 runs in PWM mode: • Soft start • Soft transient: the period of 100 μs following any VID change • ...

Page 14

... ADP3209 × RAMP CLOCK OSCILLATOR VCC D 0.2V RAMP COMP R A GATE DRIVER DRVH FLIP-FLOP DRVL RD VDC + – – CSCOMP FB FBRTN LLINE Figure 20. PWM Mode Operation Rev Page www.onsemi.com 5V BST VCC BST DRVH ...

Page 15

... Setting Switch Frequency Master Clock Frequency in PWM Mode When the ADP3209 runs in PWM, the clock frequency is set by an external resistor connected from the RT pin to GND. The frequency varies with the VID voltage: the lower the VID voltage, the lower the clock frequency. The variation of clock frequency with VID voltage maintains constant V improves power conversion efficiency at lower VID voltages ...

Page 16

... SS capacitor is reset to ground to prepare the chip for a subsequent soft start cycle. VID CHANGE AND SOFT TRANSIENT When a VID input changes, the ADP3209 detects the change but ignores new code for a minimum of 400 ns. This delay is required to prevent the device from reacting to digital signal skew while the 5- bit VID input code is in transition ...

Page 17

... ADP3209 operates in continuous conduction mode (CCM), and the upper and lower MOSFETs run synchronously and in complementary phase. See Figure 24 for the typical waveforms of the ADP3209 running in CCM with load current. 3 With lighter loads, the ADP3209 enters discontinuous con- duction mode (DCM). Figure 25 shows a typical single-phase buck with one upper FET, one lower FET, an output inductor, an output capacitor, and a load resistor ...

Page 18

... GMCH chipset from destruction. When the OVP feature is triggered, the ADP3209 is latched off. The latch-off function can be reset by removing and reapplying VCC to the ADP3209 or by briefly pulling the EN pin low. REVERSE VOLTAGE PROTECTION Very large reverse current in inductors can cause negative ...

Page 19

... V voltage is monitored through the CSREF pin. When the CCGFX CSREF pin voltage drops to less than −300 mV, the ADP3209 triggers the RVP function by setting both DRVH and DRVL low, thus turning off all MOSFETs. The reverse inductor currents can be quickly reset discharging the built-up energy in the inductor into the input dc voltage source via the forward-biased body diode of the high-side MOSFETs ...

Page 20

... ADP3209 Table 4. VID Codes Enable VID4 VID3 VID2 VID1 ...

Page 21

... VID4 VID3 VID2 VID1 VID0 VR_ON Figure 34. Typical Application Circuit Rev Page www.onsemi.com ADP3209 06375-034 ...

Page 22

... With VARFREQ pulled above 4 V, the ADP3209 operates with a constant switching frequency. The switching frequency does not change with VID voltage, input voltage, or load current. In addition, the DCM operation at light load is disabled, so the ADP3209 operates in CCM. The value of RT can be calculated by using the following equation ...

Page 23

... SENSE or R can be chosen for added flexibility. Due to the CS PH 560 × mΩ 200 kΩ can be tuned. In this standard value and no tuning is CS should NPO capacitor rearranging Equation 7 as follows: PH ADP3209 ). (7) (8) resistance ...

Page 24

... DCR. Due to the nonlinear nature of NTC thermistors, series resistors R and R (see Figure 35) are needed to linearize CS1 CS2 the NTC and produce the desired temperature coefficient tracking. PLACE AS CLOSE AS POSSIBLE TO INDUCTOR OR LOW-SIDE MOSFET R TH ADP3209 CSCOMP R CS1 CS1 CS2 CSFB 12 ...

Page 25

... R = 3.5 mΩ ≤ C × R × ≤ × × μ mΩ ADP3209 CCGFX ⎞ ⎟ ⎟ ⎟ = μ μF 256 F ⎟ ⎟ ⎟ ⎠ − 44 μ low enough to X (14) of the X ...

Page 26

... ADP3209 POWER MOSFETS For typical 15 A per phase applications, the N-channel power MOSFETs are selected for one high-side switch and one low- side switch. The main selection parameters for the power MOSFETs are and R GS(TH) G ISS RSS voltage of the gate driver logic-level threshold MOSFETs must be used ...

Page 27

... R X resistance of the regulator. For this example, the overall ramp signal is 0.23 V. CURRENT LIMIT SETPOINT To select the current limit setpoint, the resistor value for R be determined. The current limit threshold for the ADP3209 is set with R R (19) where: R ...

Page 28

... A Type III compensator on the voltage feedback is adequate for proper compensation of the output filter. Figure 36 shows the Type III amplifier used in the ADP3209. Figure 37 shows the locations of the two poles and two zeros created by this amplifier. VOLTAGE ERROR ...

Page 29

... Build a circuit based on the compensation values computed from the design spreadsheet. 2. Connect a dc load to the circuit. 3. Turn on the ADP3209 and verify that it operates properly. 4. Check for jitter with no load and full load conditions. Set the DC Load Line 1. Measure the output voltage with no load (V that this voltage is within the specified tolerance range ...

Page 30

... If critical signal lines (including the output voltage sense lines of the ADP3209) must cross through power circuitry best if a signal ground plane can be interposed between those signal lines and the traces of the power circuitry. This serves as a shield to minimize noise injection into the signals at the expense of increasing signal ground noise ...

Page 31

... Kelvin connected to the center point of the copper bar, which is the V inductor the back of the ADP3209 package, there is a metal pad that can be used to heat sink the device. Therefore, running vias under the ADP3209 is not recommended because the metal pad may cause shorting between vias. ...

Page 32

... SEATING PLANE ORDERING GUIDE Model Temperature Range 1 ADP3209JCPZ-RL 0°C to 100° RoHS Compliant Part. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...

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