ADS8321EB Burr-Brown Corporation, ADS8321EB Datasheet
ADS8321EB
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ADS8321EB Summary of contents
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... International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1999 Burr-Brown Corporation DESCRIPTION The ADS8321 is a 16-bit sampling analog-to-digital converter with guaranteed specifications over a 4 ...
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... SAMPLE CMOS 3 –0 –250 A 4 250 A OL Binary Two’s Complement Specified Performance 4.75 2.7 ( 10kHz SAMPLE –40 2 ADS8321EB TYP MAX MIN TYP MAX 16 +V REF V + 0 0.008 0.018 0.006 0.012 % of FSR 0 0.05 0.024 0.05 0.024 0.3 ...
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... NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “ADS8321EB/2K5” will get a single 2500-piece Tape and Reel ...
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TYPICAL PERFORMANCE CURVES + +5V +2.5V 100kHz REF SAMPLE FREQUENCY SPECTRUM (8192 Point FFT 10.03kHz, –0.3dB –20 –40 –60 –80 –100 –120 –140 ...
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TYPICAL PERFORMANCE CURVES + +5V +2.5V 100kHz REF SAMPLE MAXIMUM SAMPLE RATE vs V 1000 100 (V) CC SPURIOUS FREE DYNAMIC ...
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TYPICAL PERFORMANCE CURVES + +5V +2.5V 100kHz REF SAMPLE CHANGE IN BIPOLAR ZERO vs REFERENCE VOLTAGE 6.0 5.0 4.0 3.0 2.0 1.0 0 –1.0 –2.0 –3.0 0 ...
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THEORY OF OPERATION The ADS8321 is a classic Successive Approximation Reg- ister (SAR) analog-to-digital (A/D) converter. The architec- ture is based on capacitive redistribution which inherently includes a sample/hold function. The converter is fabricated on a 0.6 CMOS process. The ...
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This may result in offset error, gain error, and linearity error which change with both tempera- ture and input voltage. If the impedance cannot be matched, the errors can be lessened by giving the ADS8321 additional acquisition ...
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AVERAGING The noise of the A/D converter can be compensated by averaging the digital codes. By averaging conversion results, transition noise will be reduced by a factor where n is the number of averages. For example, averaging ...
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DATA FORMAT The output data from the ADS8321 is in Binary Two’s Complement format as shown in Table II. This table repre- sents the ideal output code for the given input voltage and does not include the effects of offset, ...
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5. 2.5V REF f = 2.4MHz CLK 100 10 1 0.1 1 Sample Rate (kHz) FIGURE 8. Maintaining f at the Highest Possible Rate CLK Allows Supply Current to ...
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This particular source of error can be very difficult to track down if the glitch is almost synchronous to the converter’s DCLOCK signal—as the phase difference between the two changes with time and temperature, ...