ADV7120 Analog Devices, ADV7120 Datasheet
ADV7120
Specifications of ADV7120
Available stocks
Related parts for ADV7120
ADV7120 Summary of contents
Page 1
... CMOS construction ensures greater functionality with low power dissipation. The part is packaged in both a 0.6", 40-pin plastic DIP and a 44-pin plastic leaded (J-lead) chip car- rier, PLCC. The ADV7120 is also available in a very small 48- lead Thin Quad Flatpack (TQFP). ADV is a registered trademark of Analog Devices, Inc. ...
Page 2
... ADV7120–SPECIFICATIONS Parameter STATIC PERFORMANCE Resolution (Each DAC) Accuracy (Each DAC) Integral Nonlinearity, INL Differential Nonlinearity, DNL Gray Scale Error Coding DIGITAL INPUTS Input High Voltage, V INH Input Low Voltage, V INL Input Current Input Capacitance ANALOG OUTPUTS Gray Scale Current Range ...
Page 3
... TRANSITION TIME ( ) MEASURED FROM THE 50% POINT OF FULL-SCALE 8 TRANSITION TO WITHIN 2% OF THE FINAL OUTPUT VALUE OUTPUT RISE/FALL TIME ( ) MEASURED BETWEEN THE 10% AND 90% POINTS 7 OF FULL TRANSITION. Figure 1. Video Input/Output Timing –3– ADV7120 = 37 pF 560 . L SET unless otherwise noted.) ...
Page 4
... REF WHITE NOTE For the ADV7120 in TQFP package: The REF WHITE pin is not available. The I pin is not available and is internally connected to the IOG pin. SYNC Typ Max Units Model 5.00 5.25 Volts ADV7120KN80 +70 C ADV7120KN50 ADV7120KN30 37 ...
Page 5
... IOR and IOB is given by: SET IOR, IOB (mA) = 8,628 . AA and V . REF AA 5%). All V pins on the ADV7120 must be connected. AA –5– ADV7120 does not output any current while SYNC while SYNC is at logical one is given by: SYNC (V SET should be connected to AGND ...
Page 6
... All these digital inputs are specified to accept TTL logic levels. Clock Input The CLOCK input of the ADV7120 is typically the pixel clock rate of the system also known as the dot rate. The dot rate, and hence the required CLOCK frequency, will be determined ...
Page 7
... REV. B The required CLOCK frequency is thus 78.6 MHz. All video data and control inputs are latched into the ADV7120 on the rising edge of CLOCK, as previously described in the “Digital Inputs” section recommended that the CLOCK input to the ADV7120 be driven by a TTL buffer (e.g., 74F244) ...
Page 8
... Table I details how the SYNC and BLANK inputs modify the output levels. Gray Scale Operation ) can be The ADV7120 can be used for stand-alone, gray scale (mono- SYNC chrome) or composite video applications (i.e., only one channel used for video information). Any one of the three channels, red, is connected to IOG ...
Page 9
... TERMINATION) REV. B Video Output Buffers The ADV7120 is specified to drive transmission line loads, which is what most monitors are rated as. The analog output configurations to drive such loads are described in the Analog Interface section and illustrated in Figure 5. However, in some applications it may be required to drive long “transmission line” ...
Page 10
... PC board layout. Figure 8 shows a recommended connection diagram for the ADV7120. The layout should be optimized for lowest noise on the ADV7120 power and ground lines. This can be achieved by shielding the digital inputs and providing good decoupling. The lead length between groups of V ...
Page 11
... PCB power plane (V not the analog power plane. Analog Signal Interconnect The ADV7120 should be located as close as possible to the out- put connectors thus minimizing noise pickup and reflections due to impedance mismatch. The video output signals should overlay the ground plane, and not the analog power plane, thereby maximizing the high fre- quency power supply rejection ...
Page 12
... ADV7120 0.045 TYP 0.17 (4.32) MAX 0.021 (0.533) 0.015 (0.381) 0.004 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 44-Terminal Plastic Leaded Chip Carrier (P-44A) 0.045 TYP 0.045 TYP PIN 1 IDENTIFIER 0.045 TYP TOP VIEW (PINS DOWN 0.656 (16.662) SQ 0.650 (16.510) ...