AN217 Silicon Laboratories, AN217 Datasheet

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AN217

Manufacturer Part Number
AN217
Description
C8051F35X DELTA-SIGMA ADC USERS GUIDE
Manufacturer
Silicon Laboratories
Datasheet

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C8051F35
Relevant Devices
This application note applies to the following devices:
C8051F350, C8051F351, C8051F352, C8051F353
1. Introduction
Delta-sigma analog-to-digital converters (ADCs) are oversampling ADCs: to reduce noise and analog front-end
circuit cost and complexity, they sample signals at very high rates and produce a low-noise, high-resolution output.
Oversampling at a “high” rate means sampling a signal at a frequency that is well above the bandwidth of interest’s
Nyquist rate and is done to lower in-band noise. The output word rate of the ADC will be close to the bandwidth of
interest.
Delta-sigma ADCs also add benefit by shaping noise and digitally filtering the information to enhance performance.
The oversampling, noise shaping, and digital filtering allow highly linear, high-resolution signal measurements, and
reduce the cost and complexity of circuits that must filter the signal at the input of the ADC.
Delta-sigma ADCs oversample a signal and produce relatively low output data rates and are best used in
applications requiring high precision measurements (16 to 24 bits) of low-bandwidth signals (i.e., typically 20 kHz
or less). Example applications include digital phones, temperature measurements, pressure measurements, and
weigh-scales. The maximum C8051F35x ADC output word rate is 1 kHz.
Rev. 0.2 2/05
AIN+
AIN-
AV+
X
Buffers
Input
D
E L TA
Offset
DAC
8-Bit
-S
Copyright © 2005 by Silicon Laboratories
Figure 1. ADC0 Block Diagram
I G M A
Σ
Reference
Voltage
Σ
ADC U
PGA
S E R
S
Modulator
G
U I D E
÷
AN217
SYSCLK
SINC
Filter
Filter
Fast
AN217
3

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AN217 Summary of contents

Page 1

... The maximum C8051F35x ADC output word rate is 1 kHz. AV+ Input Buffers AIN+ AIN- Rev. 0.2 2/05 -S ADC Voltage Reference Σ PGA Σ 8-Bit Offset DAC Figure 1. ADC0 Block Diagram Copyright © 2005 by Silicon Laboratories AN217 ’ SINC Filter Modulator Fast Filter ÷ SYSCLK 3 AN217 ...

Page 2

... AN217 2. Using the C8051F35x Delta-Sigma ADC Using delta-sigma ADCs require an understanding of how to properly configure the modulator, use of the digital filter/decimator, and the nature of high-precision measurements of small signal voltages. Additionally, the C8051F35x family of devices’ ADC provides functions such as calibration and offset adjustment that should be fully understood when designing with these devices ...

Page 3

... ADC, so each sample does not result in an ADC output. The signal is oversampled and then filtered to achieve the high-resolution measurement with reduced analog front-end circuit requirements. 5. Configure Voltage Reference Σ PGA Σ 2. Gain Figure 2. Configuring The Delta-Sigma ADC Rev. 0.2 AN217 7. Calibrate 3 SINC Filter Modulator Fast Filter 6. Configure 3 ...

Page 4

... AN217 2.2.1. Voltage Reference The voltage reference circuit should be treated as carefully as the measured signal, because noise on the voltage reference degrades ADC performance. The C8051F35x can use its on-chip voltage reference (2.4 V typical externally supplied voltage reference (input to the VREF+ and VREF– pins). For optimal performance, we recommend the use of a high-quality, low-noise external reference. To filter noise, use a 1.0 µ ...

Page 5

... SFR Definition 2.2). The MDCLK value is set using the ADC0CLK register (see SFR Definition 2.2) to achieve a frequency of 2.4576 MHz according to Equation 1: INTEGRATOR CLOCK (Kfs) ∫ LATCHED COMPARATOR +VREF (1-BIT ADC) MODULATOR -VREF Figure 3. Modulator and Digital Filter ( ) ⁄ ( MDCLK = SYSCLK ADC0CLK Equation 1. Configure Modulator Clock Frequency Rev. 0.2 AN217 CLOCK (fs) BIT DIGITAL STREAM DATA FILTER ) + 1 5 ...

Page 6

... AN217 Once the modulator clock is configured, the modulator sample rate of the ADC is also set to MDCLK/128. Therefore, the typical sample rate is 2.4576 MHz/128 = 19.2 kHz. This will be well above the signal bandwidth measured, as the maximum output word rate for the ADC is 1 kHz. ...

Page 7

... These two registers are used to form an 11-bit decimation ratio value and corresponding output word rate: 0 -100 -200 FREQUENCY (Hz) Figure 4. Digital Filter Frequency Response (SINC3) DECIMATION RATIO = Equation 2. Decimation Ratio Register Value (DECI) ⁄ [ Output Rate = MDCLK 128 Equation 3. ADC0 Output Word Rate Rev. 0.2 AN217 (SIN x)/ DECI 10:1 × DECI + 1 7 ...

Page 8

... AN217 SFR Definition 2.3. R/W R Bit7 Bit6 Bits 7–3: Unused: Read = 00000b, Write = don’t care. Bits 2–0: DECI[10:8]: ADC0 Decimation Ratio Register, Bits 10–8. This register contains the high bits of the 11-bit ADC Decimation Ratio. The decimation ratio deter- mines the output word rate of ADC0, based on the Modulator Clock (MDCLK). See the ADC0DECL register description for more information ...

Page 9

... Calibrations are initiated by writing to the ADC0 System Mode Bits (AD0SM) in the ADC0CF register (see SFR Definition 2.5). Section 5.2 of the data sheet details complete information concerning the calibration of the ADC recommended that a full self or system calibration be performed at system start-up. An MCU-scheduled regular calibration can be periodically performed for best performance of the measurement system. Rev. 0.2 AN217 9 ...

Page 10

... AN217 R/W R AD0EN - Reserved Reserved Bit7 Bit6 Bit 7: AD0EN: ADC0 Enable Bit. 0: ADC0 Disabled. ADC is in low-power shutdown. 1: ADC0 Enabled. ADC is active and ready to perform calibrations or conversions. Note: Disabling the ADC automatically resets the AD0SM bits back to the “Idle” state. Bit 6: Unused: Read = 0b, Write = don’ ...

Page 11

... Input impedance at AIN+ and AIN– should be matched to preserve common-mode rejection. Reject common-mode and ground noise: Make differential measurements and use twisted wire pairs (shielded if possible). EMI and ground noise that appears equally on both differential inputs to the ADC will not appear in the measurment. Rev. 0.2 AN217 11 ...

Page 12

... AN217 SENSOR Figure 5. Single-Ended Measurements and Ground Circuits: Poor Performance SENSOR www.DataSheet4U.com Figure 6. Differential Measurements Reject Common-Mode Noise Figure 5 shows a sensor connection for a single-ended measurement, in which the sensor and ADC systems do not necessarily share a common, low-impedance ground connection. This allows more noise due to ground variations and EMI to appear in the ADC measurement ...

Page 13

... ADC Codes Noise-Free Resolution: 6.6*sigma for 99.9% of all output codes Effective Noise: rms noise is one standard deviation (sigma) Rev. 0.2 AN217 signal Other "bins" receive samples due to noise ... ... 2^N 2^N 13 ...

Page 14

... AN217 4.1. Effective Resolution Many ADC applications measure a dynamic signal in the presence of noise. Noise sources include the ADC itself and external sources, including the voltage reference. Additionally, the analog-to-digital conversion process itself introduces quantization error as the ADC must “choose” from a finite set of output codes to represent an analog voltage input. Quantization error is also viewed as input referred quantization noise. If the noise is white, the collected samples’ ...

Page 15

... Again, using the 2.38 µV rms noise voltage (from Table 1), 99.9% of all sampled output codes should be contained within 2.38 µV x 6.6 = 15.7 µV. An LSB = 298 nV, and so the total number of noise-varying bits is as follows: 15.7 µV/298 nV = ~53 codes. 53 bits requires 26 or 6-bits of a digital code to represent 53 different output codes, and so 23 bits – 6 bits = 17-bits of noise-free resolution. Rev. 0.2 AN217 of 2.38 µV NOISERMS 15 ...

Page 16

... AN217 D C OCUMENT HANGE Revision 0.1 to Revision 0.2 Updated text on page 15. www.DataSheet4U.com 16 L IST Rev. 0.2 ...

Page 17

... N : OTES www.DataSheet4U.com Rev. 0.2 AN217 17 ...

Page 18

... AN217 C I ONTACT NFORMATION Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: MCUinfo@silabs.com Internet: www.silabs.com www.DataSheet4U.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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