CAT28C512 CATALYST [Catalyst Semiconductor], CAT28C512 Datasheet
CAT28C512
Available stocks
Related parts for CAT28C512
CAT28C512 Summary of contents
Page 1
... Write Cycle with Auto-Clear Fast Write Cycle Time: –5ms Max CMOS and TTL Compatible I/O DESCRIPTION The CAT28C512/513 is a fast,low power, 5V-only CMOS 2 parallel E PROM organized as 64K x 8-bits. It requires a simple interface for in-system programming. On-chip address and data latches, self-timed write cycle with ...
Page 2
... TOP VIEW I I TSOP Package (8mmx20mm) ( CAT28C512 25 24 TOP VIEW I/O 7 I/O 6 I/O 5 I I/O 2 I ...
Page 3
... V +0 0.8 2.4 0.4 3.5 +2.0V for periods of less than 20 ns CAT28C512/513 Test Method MIL-STD-883, Test Method 1033 MIL-STD-883, Test Method 1008 MIL-STD-883, Test Method 3015 JEDEC Standard 17 Units Test Conditions f=6MH IL z All I/O’s Open f=6MH ...
Page 4
... CAT28C512/513 MODE SELECTION Mode Read Byte Write (WE Controlled) Byte Write (CE Controlled) Standby, and Write Inhibit Read and Write Inhibit CAPACITANCE 1.0 MHz Symbol Test (1) C Input/Output Capacitance I/O (1) C Input Capacitance IN A.C. CHARACTERISTICS, Read Cycle V =5V + 10%, Unless otherwise specified CC Symbol Parameter ...
Page 5
... V REFERENCE POINTS 0.8 V 1.3V 1N914 3.3K DEVICE UNDER TEST 100 INCLUDES JIG CAPACITANCE max. stops the timer. BLC 5 CAT28C512/513 Max. Units 100 s 5096 FHD F03 OUT 5096 FHD F04 Doc. No. 25074-00 2/98 ...
Page 6
... CAT28C512/513 DEVICE OPERATION Read Data stored in the CAT28C512/513 is transferred to the data bus when WE is held high, and both OE and CE are held low. The data bus is set to a high impedance state when either goes high. This 2-line control architecture can be used to eliminate bus contention in a system environment ...
Page 7
... Advanced Page Write The page write mode of the CAT28C512/513 (essen- tially an extended BYTE WRITE mode) allows from 1 to 128 bytes of data to be programmed within a single 2 E PROM write cycle. This effectively reduces the byte- write time by a factor of 128. Following an initial WRITE operation (WE pulsed low, for ...
Page 8
... Beginning and ending state of I/O is indeterminate. 6 Doc. No. 25074-00 2/98 Toggle Bit In addition to the DATA Polling feature of the CAT28C512/ 513, the device offers an additional method for determin- ing the completion of a write cycle. While a write cycle is (I/O –I/O in progress, reading data from the device will result in I/ ...
Page 9
... Advanced HARDWARE DATA PROTECTION The following is a list of hardware data protection fea- tures that are incorporated into the CAT28C512/513. (1) V sense provides for write protection when V CC falls below 3.5V min. (2) A power on delay mechanism, t teristics), provides delay before a write sequence, after V has reached 3 ...
Page 10
... 100,000 Cycle * -40˚C to +125˚C is available upon request Notes: (1) The device used in the above example is a CAT28C512HNI-15T (100,000 Cycle Endurance, PLCC, Industrial temperature, 150 ns Access Time, Tape & Reel). (2) 28C513 is offered only in PLCC package. Doc. No. 25074-00 2/98 To allow the user the ability to program the device with ...