CAT9555 CATALYST [Catalyst Semiconductor], CAT9555 Datasheet
CAT9555
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CAT9555 Summary of contents
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... I Any of the sixteen I/Os can be configured as an input or output by writing to the configuration register. The system master can invert the CAT9555 input data by writing to the active-high polarity inversion register. The CAT9555 features an active low interrupt output which indicates to the system master that an input state has changed ...
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... CAT9555 PIN CONFIGURATION SOIC (W) / TSSOP (Y) INT SDA SCL I/O0 I/O0.1 I/O1 I/O0.2 I/O1.6 I/O0 I/O1.5 I/O0 I/O1.4 I/O0 I/O1.3 I/O0 I/O1 I/O0.7 I/O1 I/O1.0 PIN DESCRIPTION ...
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... CAT9555 = 25 C) ................................... 1. Doc. No. 8551, Rev. E ...
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... CAT9555 D.C. OPERATING CHARACTERISTICS V = 2 +85 C, unless otherwise specified ...
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... CAT9555 µ µ ...
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... CAT9555 AC TEST CONDITIONS ...
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... A0, A1, A2: Device Address Inputs These inputs are used for extended addressing capabil- ity. The A0, A1, A2 pins should be hardwired When hardwired eight CAT9555s may be SS addressed on a single bus system. The levels on these inputs are compared with corresponding bits, A2, A1, A0, from the slave address byte ...
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... CAT9555 INT: Interrupt Output INT INT INT INT The open-drain interrupt output is activated when one of the port pins configured as an input changes state (differs from the corresponding input port register bit state). The interrupt is deactivated when the input returns to its previous state or the input port register is read. ...
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... The four most significant bits of the slave address are fixed as binary 0100 (Figure 6). The CAT9555 uses the next three bits as address bits. The address bits A2, A1 and A0 are used to select which device is accessed from maximum eight devices on the same bus ...
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... If no acknowledge is sent by the Master, the device terminates data transmission and waits for a STOP condition. The master must then issue a stop condition to return the CAT9555 to the standby power mode and place the device in a known state. Registers and Bus Transactions The CAT9555 internal registers and their address and function are shown in Table 1 ...
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... Each 8-bit register may be updated independently of the other registers. Reading the Port Registers The CAT9555 registers are read according to the timing diagrams shown in Figure 10 and Figure 11. Data from the register, defined by the command byte, will be sent serially on the SDA line. Data is clocked into the register on the failing edge of the acknowledge clock pulse ...
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... CAT9555 Power-On Reset Operation When the power supply is applied to VCC pin, an internal power-on reset pulse holds the CAT9555 in a reset state until VCC reaches V level. At this point, the reset POR acknowledge from slave slave address R/W NOTE: Transfer can be stopped at any time by a STOP condition. ...
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... For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: 1. All dimensions are in millimeters. 2. Complies with JEDEC Standard MS-013 © 2007 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice NOM MAX 0.30 2.49 2.65 0.41 0.51 0.27 0.32 15.40 15.60 10.32 10.65 7.50 7.60 1.27 BSC 0.75 0.73 1. CAT9555 24-Lead_SOIC_(300mil).eps Doc. No. 8551, Rev. E ...
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... CAT9555 24-LEAD TSSOP ( SYMBOL MIN NOM A A1 0.05 A2 0.80 1.00 b 0.19 c 0.09 D 7.70 7.80 E 6.40 BSC E1 4.30 4.40 e 0.65 BSC L 0.45 0.60 L1 1.00 REF 1 0.00 For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: 1. All dimensions are in millimeters. 2. Complies with JEDEC Standard MO-153 Doc. No. 8551, Rev. E ...
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... For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: 1. All dimensions are in millimeters. 2. Complies with JEDEC Standard MO-220 © 2007 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice NOM MAX 0.75 0.80 0.02 0.05 0.25 0.30 4.00 4.05 2.50 2.60 4.00 4.05 2.50 2.60 0.40 0.50 15 CAT9555 TQFN_24-Lead_4X4.eps Doc. No. 8551, Rev. E ...
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... Notes: (1) All packages are RoHS-compliant (Lead-free, Halogen-free). (2) The standard lead finish is Matte-Tin. (3) The device used in the above example is a CAT9555WI-T1 (SOIC, Industrial Temperature, Matte-Tin, Tape & Reel). (4) For additional package and temperature options, please contact your nearest Catalyst Semiconductor Sales office. O ...
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REVISION HISTORY Date Rev. Reason Advance Information - Initial Issue 12/9/2004 A 1/7/2005 B Advance Information - Minor changes Advance Information - 03/11/05 C Edit Features Edit Ordering Information 09/25/06 D Initial Release 03/12/07 E Update Ordering Information: Tape and ...