cdp1871ac Intersil Corporation, cdp1871ac Datasheet
cdp1871ac
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cdp1871ac Summary of contents
Page 1
... Scans and Generates Code for 53 Key ASCII Keyboard Plus 32 HEX Keys (SPST Mechanical Contact Switches) • Shift, Control, and Alpha Lock Input • RC-Controlled Debounce Circuitry • Single Supply 4V to 10. (CDP1871A 6. (CDP1871AC) • N-Key Lockout Ordering Information PACKAGE TEMP. RANGE ...
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... CS2 22 23 CS3 24 CS4 CONTROL 34 TPB LOGIC KEY V DETECT DD F/F R DEBOUNCE KEY DOWN DETECT STATUS LATCHES 35 RPT CDP1871A, CDP1871AC V DD 0.1 F 100K 40 36 DEBOUNCE 11 D11 OF 8 SWITCHES EACH CDP1871A BUS0-BUS7 S8 ...
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... Voltages Referenced to V Terminal) SS CDP1871A -0.5V to +11V CDP1871AC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V Input Voltage Range, All Inputs . . . . . . . . . . . . . -0. Input Current, any One Input CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specifi ...
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... CDP1871A, CDP1871ACCDP1871A, CDP1871AC Static Electrical Specifications PARAMETER (V) Output High Drive (Source) I 4.6 OH Current 9.5 Input Low Voltage V 0.5, 4.5 IL (Except Debounce Input High Voltage V 0.5, 4.5 IH (Except Debounce Debounce Schmitt Trigger V 0.4 D Input Voltage Positive Trigger Voltage 0.5 Negative Trigger Voltage V 0 ...
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... CONTROL NOTE Don’t Care CDP1871A, CDP1871AC TPB (Input): The input clock used to drive the scan generator and reset the status flag (DA). This input is normally connected to the TPB output of the CDP1800-series microprocessor. RPT (Output): The repeat output flag which is used to indicate that a key is still closed after data has been read from the CDP1871A (DA = high) ...
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... CONTROL overrides SHIFT and ALPHA 2. Showing ASCII outputs for all combinations with and without SHIFT, ALPHA LOCK and CONTROL. 3. Drive lines and 11 generate non-ASCII hex values which can be used for special codes. CDP1871A, CDP1871AC TABLE 2. VALID N-LINE CONNECTIONS CDP1871A SIGNAL ...
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... The TPB input clocks the scancounters and is also used to reset the Data Available output (DA). When a valid keydown condition is detected on a sense line, the control logic inhib- its the clock to the scancounters on the next low-to-high tran- sition of TPB and the DA output is set low. The scancounter CDP1871A, CDP1871AC ...
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... DD 4- This X X CDP1871ACD, CDP1871ACE (NOTE 1) MIN TYP MAX UNITS - - - Note Note 2 100 260 500 150 850 1900 ...
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... RPT DEBOUNCE D1-D11 PRESENT COUNT CS (NOTE) t CDV BUS0-BUS7 NOTE CS1 CS2 CS3 CS4 CS1, CS2, CS3 = (CPU N-LINES) CS4 (MRD) is High for CPU Input Instruction FIGURE 4. FIGURE 4. CDP1871A DYNAMIC TIMING DIAGRAM (REPEAT) CDP1871A, CDP1871AC OPEN CLOSED t DAH t RPH t RPL ...
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... FIGURE 5. TYPICAL SYSTEM SOFTWARE FLOWCHART FOR CDP1871A, CDP1871AC All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...