CY7C1019D-10VXI Cypress Semiconductor Corp, CY7C1019D-10VXI Datasheet

IC SRAM 1MBIT 10NS 32SOJ

CY7C1019D-10VXI

Manufacturer Part Number
CY7C1019D-10VXI
Description
IC SRAM 1MBIT 10NS 32SOJ
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheet

Specifications of CY7C1019D-10VXI

Memory Size
1M (128K x 8)
Package / Case
32-SOJ
Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Speed
10ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Access Time
10 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
80 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
5 V
Memory Configuration
128K X 8
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
SOJ
No. Of Pins
32
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Density
1Mb
Access Time (max)
10ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
17b
Package Type
SOJ
Operating Temp Range
-40C to 85C
Supply Current
80mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Number Of Words
128K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-1964-5
CY7C1019D-10VXI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1019D-10VXI
Manufacturer:
AD
Quantity:
1 760
Part Number:
CY7C1019D-10VXI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Part Number:
CY7C1019D-10VXIT
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Cypress Semiconductor Corporation
Document #: 38-05464 Rev. *F
Features
Logic Block Diagram
Note
1. For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at www.cypress.com.
• Pin- and function-compatible with CY7C1019B
• High speed
• Low active power
• Low CMOS standby power
• 2.0V Data retention
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Center power/ground pinout
• Easy memory expansion with CE and OE options
• Functionally equivalent to CY7C1019B
• Available in Pb-free 32-pin 400-Mil wide Molded SOJ and
— t
— I
— I
32-pin TSOP II packages
AA
CC
SB2
= 10 ns
= 80 mA @ 10 ns
= 3 mA
WE
OE
CE
A 0
A 1
A 2
A 8
A 3
A 4
A 5
A 6
A 7
COLUMN DECODER
198 Champion Court
INPUT BUFFER
128K x 8
ARRAY
POWER
DOWN
Functional Description
The CY7C1019D is a high-performance CMOS static RAM
organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and tri-state drivers. This
device has an automatic power-down feature that significantly
reduces power consumption when deselected. The eight input
and output pins (IO
high-impedance state when:
Write to the device by taking Chip Enable (CE) and Write
Enable (WE) inputs LOW. Data on the eight IO pins (IO
through IO
address pins (A
Read from the device by taking Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH.
Under these conditions, the contents of the memory location
specified by the address pins appears on the IO pins.
• Deselected (CE HIGH)
• Outputs are disabled (OE HIGH)
• When the write operation is active (CE LOW, and WE LOW).
1-Mbit (128K x 8) Static RAM
San Jose
7
) is then written into the location specified on the
0
through A
,
CA 95134-1709
0
through IO
16
).
[1]
Revised December 14, 2010
IO 0
IO 1
IO 2
IO 3
IO 4
IO 5
IO 6
IO 7
7
) are placed in a
CY7C1019D
408-943-2600
0
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Related parts for CY7C1019D-10VXI

CY7C1019D-10VXI Summary of contents

Page 1

... Cypress Semiconductor Corporation Document #: 38-05464 Rev. *F 1-Mbit (128K x 8) Static RAM Functional Description The CY7C1019D is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. This device has an automatic power-down feature that significantly reduces power consumption when deselected ...

Page 2

... Pin Configuration Selection Guide Maximum Access Time Maximum Operating Current Maximum Standby Current Document #: 38-05464 Rev. *F SOJ/TSOPII Top View –10 (Industrial CY7C1019D Unit Page [+] Feedback ...

Page 3

... OUT 1/t max RC Max > > < max Max > V – 0.3V > V – 0.3V < 0.3V CY7C1019D Ambient V Speed CC Temperature 5V  0.5V –40C to +85 –10 (Industrial) Unit Min Max 2.4 0.4 2 0.5 CC –0.5 0.8 A –1 +1 A –1 +1 100 MHz MHz ...

Page 4

... Still Air, soldered × 4.5 inch, four-layer printed circuit board [4] 3.0V 30 pF* GND 3 ns Rise Time: High-Z characteristics: R1 480 5V OUTPUT 255 INCLUDING JIG AND SCOPE (c) CY7C1019D Max Unit 400-Mil TSOP II Unit Wide SOJ C/W 56.29 62.22 C/W 38.14 21.43 ALL INPUT PULSES 90% ...

Page 5

... The minimum write cycle time for Write Cycle no. 3 (WE controlled, OE LOW) is the sum of t Document #: 38-05464 Rev. *F [5] Description values until the first memory access can be performed. CC “AC Test Loads and Waveforms is less than less than t , and t HZCE LZCE HZOE LZOE HZWE and t HZWE CY7C1019D –10 (Industrial) Unit Min Max s 100 ...

Page 6

... CE > > V – 0. < 0. DATA RETENTION MODE 4.5V > CDR [13, 14 OHA DOE DATA VALID 50% > 50 s or stable at V > 50  CC(min) CC(min) CY7C1019D Min Max Unit 2.0 V – 0.3V 4. DATA VALID t HZOE t HZCE HIGH IMPEDANCE t PD ICC 50% ISB Page [+] Feedback ...

Page 7

... If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. 18. During this period the IOs are in the output state and input signals should not be applied. Document #: 38-05464 Rev SCE t SCE PWE DATA VALID [16, 17 SCE PWE t SD DATA VALID IN CY7C1019D Page [+] Feedback ...

Page 8

... Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS DATA IO NOTE 18 t HZWE Truth Table – High Data Out Data High Z Document #: 38-05464 Rev. *F [11, 17 SCE PWE t SD DATA VALID Mode 7 Power-Down Read Write Selected, Outputs Disabled CY7C1019D LZWE Power Standby ( Active ( Active ( Active ( Page [+] Feedback ...

Page 9

... Ordering Information Speed Ordering Code (ns) 10 CY7C1019D-10VXI CY7C1019D-10ZSXI Ordering Code Definitions XXX Please contact your local Cypress sales representative for availability of these parts. Document #: 38-05464 Rev. *F Package Package Type Diagram 51-85033 32-pin (400-Mil) Molded SOJ (Pb-free) 51-85095 32-pin TSOP Type II (Pb-free) ...

Page 10

... Package Diagrams Figure 1. 32-pin (400-Mil) Molded SOJ (51-85033) Document #: 38-05464 Rev. *F CY7C1019D 51-85033 *C Page [+] Feedback ...

Page 11

... Package Diagrams (continued) Figure 2. 32-pin Thin Small Outline Package Type II (51-85095) All product or company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05464 Rev. *F CY7C1019D 51-85095 *A Page [+] Feedback ...

Page 12

... Document History Page Document Title: CY7C1019D, 1-Mbit (128K x 8) Static RAM Document Number: 38-05464 REV. ECN NO. Issue Date ** 201560 See ECN *A 233715 See ECN *B 262950 See ECN *C 307598 See ECN *D 520647 See ECN *E 802877 See ECN *F 3110052 12/14/2010 Document #: 38-05464 Rev. *F Orig ...

Page 13

... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. cypress.com/go/plc CY7C1019D PSoC Solutions psoc.cypress.com/solutions ...

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