EL7585 INTERSIL [Intersil Corporation], EL7585 Datasheet
EL7585
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EL7585 Summary of contents
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... V or for and V ON OFF BOOST ON latter requires a single external transistor. The timing of the start-up sequence is set using an external capacitor. The EL7585 is specified for operation over the -40°C to +85°C temperature range. Pinout EL7585 (20-PIN QFN) TOP VIEW CDLY 1 DELB 2 ...
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... FBP Regulation Voltage FBP V FBP Fault Trip Point F_FBP I FBP Input Bias Current FBP GMP FBP Effective Transconductance 2 EL7585 = 25°C) V DRVL Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Maximum continuous junction temperature . . . . . . . . . . . . . . 125° ...
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... C Delay Capacitor DEL FAULT DETECTION t Fault Time Out FAULT OT Over-temperature Threshold I PG Pull-down Current PG LOGIC ENABLE V Logic High Threshold HI V Logic Low Threshold LO 3 EL7585 = 11V 200mA 15V, V BOOST LOAD ON CONDITION I 0mA to 20mA 1.1V 25V FBP DRVP V = 1.5V 35V FBP DRVP ...
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... I (A) OUT FIGURE 1. V EFFICIENCY AT V BOOST 4 EL7585 = 11V 200mA 15V, V BOOST LOAD ON CONDITION capacitor connected from this pin to GND sets the delay time for start-up sequence and sets the fault timeout time Gate drive of optional V delay FET BOOST Drain of the internal N channel boost FET ...
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... I (A) OUT FIGURE 5. V LOAD REGULATION AT V BOOST =15V =12V 0.2 0.4 I (A) OUT FIGURE 7. V LOAD REGULATION AT V BOOST 5 EL7585 (Continued =12V O 0.5 0.6 0.7 =3V (P MODE) FIGURE = =12V O 0.4 0.5 0.6 =3V (PI MODE) FIGURE =9V O 0.6 0.8 =3V (P MODE) FIGURE 8 ...
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... ON 0 -0.2 -0.4 -0.6 -0.8 -1 -1.2 0 100 200 300 400 I (mA) OUT FIGURE 11. V LOAD REGULATION LOGIC V CDLY V REF V BOOST V LOGIC TIME (10ms/DIV) FIGURE 13. START-UP SEQUENCE 6 EL7585 (Continued 500 600 700 V C =220nF DLY 0 -0.2 -0.4 -0.6 -0.8 -1 -1.2 -1 (mA) OUT FIGURE 10. V LOAD REGULATION OFF V ...
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... OUT I =200mA OUT TIME (400ns/DIV) FIGURE 17. LX WAVEFORM - CONTINUOUS MODE FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE 7 EL7585 (Continued) C =220nF DLY FIGURE 16. LX WAVEFORM - DISCONTINUOUS MODE FIGURE 18. PACKAGE POWER DISSIPATION vs AMBIENT JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD - QFN EXPOSED ...
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... C INT THERMAL SHUTDOWN DRVN BUFFER FBN Applications Information The EL7585 is a highly integrated multiple output power solution for TFT-LCD applications. The system consists of one high efficiency boost converter and three linear- regulator controllers ( and V ON OFF protection functions. A block diagram is shown in Figure 20. ...
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... This results in a compact, low cost power system for LCD panel design. The EL7585 is designed for continuous current mode, but they can also operate in discontinuous current mode at light load. In continuous current mode, current flows continuously in the inductor during the entire switching cycle in steady state operation ...
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... S I value, measured at zero volts. OMAX 1 1.040686 Compensation 1 0.719853 The EL7585 can operate in either P mode or PI mode. Connecting the C 1 0.527353 For better load regulation, use PI mode with a 4.7nF 1 1.576797 capacitor in series with a 10K resistor between C 1 1.090686 ground ...
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... Darlington PNP transistor for Q5 requires that V V BOOST voltage be required, then an ordinary high gain PNP transistor should be selected for allow a lower collector-emitter saturation voltage). For the EL7585, the minimum drive current is: FB I_DRVL_min = 8mA The minimum base-emitter resistor, R calculated as: R _min = V BL 1.25V/(8mA - 500mA/100) = 417Ω ...
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... Typical V voltage supported by EL7585 ranges from +15V to ON +36V. A fault comparator is also included for monitoring the output voltage. The under-voltage threshold is set at 25% below the 1 ...
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... STAGE OF CHARGE PUMP 13 EL7585 Discontinuous/Continuous Boost Operation and its Effect on the Charge Pumps The EL7585 V edges to drive diode charge pumps from which LDO regulators generate the V appreciated that should a regular supply of LX switching edges be interrupted, for example during discontinuous operation at light A affect the performance of V depending on their exact loading conditions at the time ...
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... Fault Sequencing The EL7585 has an advanced fault detection system which protects the IC from both adjacent pin shorts during operation and shorts on the output supplies. A high quality layout/design of the PCB, in respect of ...
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... EL7585 V CDLY EN V REF V BOOST LOGIC V OFF t DEL1 DELAYED V BOOST V ON START-UP SEQUENCE TIMED BY C FIGURE 28. START-UP SEQUENCE DEL2 DLY FN7345.1 July 1, 2005 ...
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... Demo Board Layout FIGURE 29. TOP LAYER 16 EL7585 6. The exposed die plate, on the underneath of the package, should be soldered to an equivalent area of metal on the PCB. This contact area should have multiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC ...
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... LOGIC (2.5V 5.4kΩ 31 5kΩ 4.7µF NOTE: The SGND should be connected to the exposed die plate and connected to the PGND at one point only. 17 EL7585 6.8µH 46.5kΩ 5kΩ CDELAY FBB DELB VDD ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 18 EL7585 FN7345.1 July 1, 2005 ...