EPC1 Altera Corporation, EPC1 Datasheet

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EPC1

Manufacturer Part Number
EPC1
Description
Configuration EPROMs For Flex Devices
Manufacturer
Altera Corporation
Datasheet

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Features
Altera Corporation
DS-EPROM-12.2
December 2002, ver. 12.2
Serial device family for configuring APEX
APEX 20K, APEX 20KC, and APEX 20KE), Mercury
and FLEX
Easy-to-use 4-pin interface to APEX II, APEX 20K, Mercury, ACEX,
and FLEX devices
Low current during configuration and near-zero standby current
5.0-V and 3.3-V operation
Software design support with the Altera
MAX+PLUS
well as Sun SPARCstation, and HP 9000 Series 700/800
Programming support with Altera’s Master Programming Unit
(MPU) and programming hardware from Data I/O,
BP Microsystems, and other manufacturers
Available in compact plastic packages (see
EPC2 device has reprogrammable Flash configuration memory
8-pin plastic dual in-line package (PDIP)
20-pin plastic J-lead chip carrier (PLCC) package
32-pin plastic thin quad flat pack (TQFP) package
100-pin plastic thin quad flat pack (TQPF) package
88-pin Ultra FineLine BGA
5.0-V and 3.3-V in-system programmability (ISP) through the
built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG)
interface
Built-in JTAG boundary-scan test (BST) circuitry compliant with
IEEE Std. 1149.1
ISP circuitry is compatible with IEEE Std. 1532 for EPC2
configuration device
Supports programming through Serial Vector Format Files
(.svf), Jam
(STAPL) Files (.jam), Jam STAPL Byte-Code Files (.jbc), and the
MAX+PLUS II software via the MasterBlaster
ByteBlasterMV
nINIT_CONF pin allows a JTAG instruction to initiate device
configuration
Can be programmed with Programmer Object Files (.pof) for
EPC1 and EPC1441 devices
Available in 20-pin PLCC and 32-pin TQFP packages
®
®
(FLEX 6000, FLEX 10KE, and FLEX 10KA) devices
®
II development systems for Windows-based PCs as
TM
Standard Test and Programming Language
Configuration Devices for
TM
, or BitBlaster
SRAM-Based LUT Devices
TM
package
TM
download cable
®
TM
Quartus
Figures 1
II, APEX 20K (including
TM
®
TM
II and
,
and 2)
, ACEX
Data Sheet
®
1K,
1

Related parts for EPC1

EPC1 Summary of contents

Page 1

... BitBlaster – nINIT_CONF pin allows a JTAG instruction to initiate device configuration – Can be programmed with Programmer Object Files (.pof) for EPC1 and EPC1441 devices – Available in 20-pin PLCC and 32-pin TQFP packages SRAM-Based LUT Devices Data Sheet TM II, APEX 20K (including ...

Page 2

... EPC1, EPC1441, EPC1213, and EPC1064 devices are one-time programmable devices. ISP programming is not available in these devices because they do not have JTAG pins. (2) The nCASC pin is available on EPC1 and EPC1213 devices. On the EPC1064, EPC1064V, and EPC1441 devices reserved pin and should not be connected. 2 ...

Page 3

... APEX II, APEX 20K, Mercury, ACEX, and FLEX devices. Altera configuration devices. Table 1. Configuration Devices Device EPC16 16,000,000 EPC8 8,000,000 EPC4 4,000,000 EPC2 1,695,680 EPC1 (1) 1,046,496 EPC1441 (1) 440,800 EPC1213 (1) 212,942 EPC1064 (1) 65,536 EPC1064V 65,536 Note to Table 1: (1) These devices are one-time programable N.C. 24 VPP 2 23 N.C. ...

Page 4

... EP20K100 (2.5 V) EP20K200 EP20K400 ACEX 1K EP1K10 (2.5 V) EP1K30 EP1K50 EP1K100 4 lists the configuration device used with each APEX II, APEX 20K, Data Size EPC1064 EPC1213 EPC1441 EPC1 EPC2 EPC4 EPC8 EPC16 (Bits) EPC1064V 4,714,000 6,276,000 9,612,000 17,390,000 1,297,000 4,383,000 1,964,000 3,901,000 5,564,000 8,938,000 347,000 ...

Page 5

... EPF8282A / 8000A EPF8282AV (5.0 V) (3.3 V) EPF8452A EPF8636A EPF8820A EPF81188A EPF1500A Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Data Size EPC1064 EPC1213 EPC1441 EPC1 EPC2 EPC4 EPC8 EPC16 (Bits) EPC1064V 470,000 785,000 785,000 1,336,000 1,840,000 2,757,000 2,757,000 120,000 1 402,000 621,000 ...

Page 6

... Figure 3: (1) Do not use EPC2 devices to configure FLEX 6000 devices. (2) The EPC1441, EPC1064, and EPC1064V devices do not support data cascading. The EPC2, EPC1, and EPC1213 devices support data cascading. (3) The OE pin is a bidirectional open-drain pin. 6 shows the configuration device block diagram. ...

Page 7

... The configuration device’s OE and nCS pins control the tri-state buffer on the DATA output pin, and enable the address counter (and the oscillator in EPC4, EPC 8, EPC16, EPC2, EPC1, and EPC1441 devices). When OE is driven low, the configuration device resets the address counter and tri- states its DATA pin ...

Page 8

... APEX 20K, Mercury, ACEX 1K, and FLEX devices can be configured with EPC4, EPC8, EPC16, EPC2, EPC1, or EPC1441 devices. FLEX 6000 devices can be configured with EPC1 or EPC1441 devices. APEX II devices can be configured with EPC2, EPC4, EPC8, and EPC16 devices. The EPC4, EPC8, EPC16, EPC2, EPC1, or EPC1441 device stores configuration data in its EPROM array and serially clocks data out with an internal oscillator ...

Page 9

... EPC16, and EPC2 configuration devices cannot be used with FLEX 6000 devices. All other connections are the same for APEX II, APEX 20K, Mercury, ACEX 1K, and FLEX devices. (4) The nINIT_CONF pin is only available on EPC2, EPC4, EPC8, and EPC16 devices and has an internal pull that is always active. If nINIT_CONF is not available or not used, nCONFIG must be pulled to V through a 1-k resistor. ...

Page 10

... APEX II, APEX 20K, Mercury, ACEX 1K, and FLEX device configuration. For information on EPC4, EPC8, and EPC16 devices, refer to Configuration Devices (EPC4, EPC8, & EPC16) Data Table 3. EPC2, EPC1, & EPC1441 Pin Functions During APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K & FLEX 6000 Configuration (Part Pin Name ...

Page 11

... Table 3. EPC2, EPC1, & EPC1441 Pin Functions During APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K & FLEX 6000 Configuration (Part Pin Name Pin Number 8-Pin 20-Pin PDIP (3) PLCC ( nCASC – 13 nINIT_CONF (5), (7) (7) – 11 TDI (7) – 1 TDO (7) – 19 TMS (7) – ...

Page 12

... Configuration Devices for SRAM-based LUT Devices Data Sheet Table 3. EPC2, EPC1, & EPC1441 Pin Functions During APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K & FLEX 6000 Configuration (Part Pin Name Pin Number 8-Pin 20-Pin PDIP (3) PLCC VCC 5 10 GND ...

Page 13

... The master EPC2 or EPC1 device clocks all subsequent slave devices until configuration is complete. Once all configuration data is transferred and the nCS pin on the master EPC2 or EPC1 device is driven high by the LUT- based PLD’s CONF_DONE pin, the master EPC2 or EPC1 device clocks 16 additional cycles to initialize the LUT-based PLD(s) ...

Page 14

... The diagram shows an APEX II, APEX 20K, Mercury, ACEX 1K, and FLEX device, which has MSEL0 and MSEL1 tied to ground. For FLEX 6000 devices, MSEL is tied to ground, and the DATA0 pin is named DATA. EPC8, EPC16, and EPC2 devices cannot be used with FLEX 6000 devices. All other connections are the same for FLEX 6000 devices ...

Page 15

... CONF_DONE nCONFIG GND nCE Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Figure 6 shows two APEX II, APEX 20K, Mercury, ACEX 1K, and FLEX devices configured with two EPC2 or EPC1 devices. Note (1) LUT-Based PLD (3) DCLK MSEL0 DATA0 MSEL1 nSTATUS CONF_DONE ...

Page 16

... For FLEX 6000 devices, MSEL is tied to ground, and the DATA0 pin is named DATA. EPC2 cannot be used with FLEX 6000 devices. All other connections are the same for FLEX 6000 devices. (4) EPC4, EPC8, and EPC16 devices cannot be cascaded. (5) The nINIT_CONF pin is only available on EPC2 devices and has an internal pull that is always active. If ...

Page 17

... CLK Notes to Table 4: (1) For more information regarding EPC4, EPC8, or EPC16 configuration device timing parameters, see the Enhanced Configuration Device (EPC4, EPC8 & EPC16) Data (2) The configuration device imposes a POR delay upon initial power-up to allow the voltage supply to stabilize. Subsequent reconfigurations do not incur this delay. ...

Page 18

... EPC1 and EPC1441 devices at 3.3 V. Notes to (1) (2) 18 defines the APEX 20K, FLEX 10K, and FLEX 6000 timing Table 5. APEX 20K, FLEX 10K & FLEX 6000 Timing Parameters using EPC1 & EPC1441 Devices at 3.3 V Symbol Parameter t POR delay ...

Page 19

... DCLK frequency CLK Notes to Table 6: (1) Do not use EPC16, EPC8, EPC4, or EPC2 devices to configure FLEX 6000 devices. (2) For more information regarding EPC4, EPC8, or EPC16 configuration device timing parameters, see the Enhanced Configuration Device (EPC4, EPC8 & EPC16) Data (3) The configuration device imposes a POR delay upon initial power-up to allow the voltage supply to stabilize ...

Page 20

... POF. When the EPC1 or EPC1441 device is programmed with an EPC1213, EPC1064, or EPC1064V POF, the FLEX 8000 device drives the EPC1 or EPC1441 device’s OE pin high and clocks the EPC1 or EPC1441 device. One EPC1 device can store more configuration data than the EPC1064, EPC1064V, EPC1213, or EPC1441 device ...

Page 21

... Figure 9. FLEX 8000 Multi-Device Configuration with Two EPC1 or EPC1213 Configuration Devices (1) VCC FLEX 8000 Device 1 "0" nS/P CONF_DONE "0" MSEL1 nSTATUS "0" MSEL0 DATA0 nCONFIG FLEX 8000 Device 2 "0" nS/P CONF_DONE "1" MSEL1 nSTATUS "0" MSEL0 DCLK ...

Page 22

... This package is available for EPC1441, EPC1064, and EPC1064V devices only. (3) The EPC1441, EPC1064, and EPC1064V devices do not support data cascading. The EPC1 and EPC1213 devices support data cascading for FLEX 8000 devices. f For more information on FLEX 8000 device configuration, see the ...

Page 23

... During initial power-up, a POR delay occurs to permit voltage levels to stabilize. When configuring an APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, or FLEX 6000 device with an EPC4, EPC8, EPC16, EPC2, EPC1, or EPC1441 device, the POR delay occurs inside the configuration device, and the POR delay is a maximum of 200 ms. When configuring a ...

Page 24

... EPC2, EPC1, and EPC1441 devices can configure 5.0-V, 3.3-V, or 2.5-V devices. For each configuration device, an option must be set for 5.0-V or 3.3-V operation (EPC4, EPC8, and EPC16 devices are 3.3 V). For EPC1 and EPC1441 configuration devices, the Use Low-Voltage Configuration EPROM option in the Global Project Device Options dialog box (Assign menu) in the MAX+PLUS II software sets this parameter ...

Page 25

... Mercury, ACEX 1K, or FLEX devices’ VCCINT and VCCIO pins may be connected to 2 5.0 V, depending upon the device. The configuration device may be powered EPC1, EPC1441, EPC1213, EPC1064, or EPC1064V configuration device is powered at 3.3 V, the nSTATUS and CONF_DONE pull-up resistors must be connected to 3 ...

Page 26

... FLEX 8000 Programmable Logic Device Family Data Sheet FLEX 6000 Programmable Logic Device Family Data Sheet Mercury Programmable Logic Device Family Data Sheet Table 3.3-V Operation 3.3-V 5.0-V Tolerant Tolerant Altera Corporation 9. 3.3-V Tolerant ...

Page 27

... EPC4, EPC8, EPC16, and EPC2 configuration devices can be programmed in-system through its industry-standard 4-pin JTAG interface. ISP capability in the EPC2, EPC4, EPC8, and EPC16 devices provides ease in prototyping and updating APEX II, APEX 20K, Mercury, ACEX 1K, or FLEX device functionality. The EPC8 and EPC16 devices can be programmed in-system via test equipment using SVF Files, Jam STAPL Files ( ...

Page 28

... The EPC2 device supports the JTAG instructions shown in Boundary-Scan Testing The ISP circuitry in EPC2, EPC4, EPC8, and EPC16 devices is compatible with tools that support the IEEE Std. 1532. The IEEE Std. 1532 is a standard developed to allow concurrent ISP between multiple PLD vendors. f For EPC4, EPC8, and EPC16 JTAG instruction, refer to the Configuration Devices (EPC4, EPC8, & ...

Page 29

... Operating Conditions Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet Figure 10. EPC2 JTAG Waveforms TMS TDI t JCP t t JCH JCL TCK t JPZX TDO t JSSU Signal to Be Captured t JSZX Signal to Be Driven Table 11 shows the timing parameters and values for configuration devices. Table 11. JTAG Timing Parameters & ...

Page 30

... Configuration Devices for SRAM-based LUT Devices Data Sheet f For EPC4, EPC8, and EPC16 device operating conditions, refer to the Enhanced Configuration Devices (EPC4, EPC8, & EPC16) Data Table 12. Absolute Maximum Ratings Symbol Parameter V Supply voltage input voltage ground current ...

Page 31

... Table 15. EPC1213, EPC1064 & EPC1064V Device I Symbol Parameter I V supply current (standby) CC0 supply current CC1 CC (during configuration) Table 16. EPC2 Device I Supply Current Values CC Symbol Parameter I V supply current (standby) CC0 supply current (during configuration) V CC1 CC Table 17. EPC1 Device I ...

Page 32

... Min Typ Max 300 100 40 65 100 5 7.7 12 100 Altera Corporation Unit MHz Unit MHz ...

Page 33

... OE low to CLK disable delay OEC t OE low (reset) to nCASC delay NRCAS t OE low time (reset) minimum NRR Table 23. ACEX 1K, FLEX 10K & FLEX 6000 Device Configuration Parameters Using EPC1 & EPC1441 Devices at 3.3-V Symbol Parameter t OE high to first clock delay high to data output enabled ...

Page 34

... Configuration Devices for SRAM-based LUT Devices Data Sheet Table 24. FLEX 8000 Device Configuration Parameters Using EPC1, EPC1441, EPC1213, EPC1064 & EPC1064V Devices Symbol Parameter t OE high to DATA output enabled OEZX t nCS low to DATA output enabled CSZX t nCS high to DATA output disabled ...

Page 35

... Notes: Altera Corporation Configuration Devices for SRAM-Based LUT Devices Data Sheet 35 ...

Page 36

... Configuration Devices for SRAM-Based LUT Devices Data Sheet ® 101 Innovation Drive Copyright © 2002 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the San Jose, CA 95134 stylized Altera logo, specific device designations, and all other words and logos that are identified as ...

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