FIN1032 Fairchild Semiconductor, FIN1032 Datasheet

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FIN1032

Manufacturer Part Number
FIN1032
Description
Fin1032 3.3v Lvds 4-bit High Speed Differential Receiver
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2001 Fairchild Semiconductor Corporation
FIN1032M
FIN1032MTC
FIN1032
3.3V LVDS 4-Bit High Speed Differential Receiver
General Description
This quad receiver is designed for high speed interconnect
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The receiver translates LVDS levels, with a typical dif-
ferential input threshold of 100mV, to LVTTL signal levels.
LVDS provides low EMI at ultra low power dissipation even
at high frequencies. This device is ideal for high speed
transfer of clock and data.
The FIN1032 can be paired with its companion driver, the
FIN1031, or any other Fairchild LVDS driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Function Table
H
Z
Pin Descriptions
Order Number
High Impedance
HIGH Logic Level
EN
H
H
H
X
X
X
L
EN
H
X
X
X
L
L
L
Package Number
Fail Safe
L
Inputs
LOW Logic Level
MTC16
M16A
Fail Safe Condition
Fail Safe Condition
R
Open, Shorted, Terminated
H
H
IN
L
L
R
OUT1
R
R
X
IN1
IN1
R
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
, R
OUT
, R
, R
X
H
H
L
L
OUT2
Pin Name
IN2
IN2
Don’t Care
GND
V
EN
EN
, R
, R
, R
CC
DS500508
Outputs
OUT3
IN3
IN3
R
OUT
H
H
H
H
L
L
Z
, R
, R
, R
IN4
IN4
OUT4
Features
Connection Diagram
Greater than 400Mbs data rate
3.3V power supply operation
0.4ns maximum differential pulse skew
2.5ns maximum propagation delay
Low power dissipation
Power OFF protection
Fail safe protection for open-circuit, shorted and termi-
nated conditions
Meets or exceeds the TIA/EIA-644 LVDS standard
Pin compatible with equivalent RS-422 and LVPECL
devices
16-Lead SOIC and TSSOP packages save space
LVTTL Data Outputs
Non-Inverting LVDS Inputs
Inverting LVDS Inputs
Driver Enable Pin
Inverting Driver Enable Pin
Power Supply
Ground
Package Description
Description
August 2001
Revised December 2001
www.fairchildsemi.com

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FIN1032 Summary of contents

Page 1

... LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock and data. The FIN1032 can be paired with its companion driver, the FIN1031, or any other Fairchild LVDS driver. Ordering Code: Order Number ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Input Voltage (V ) OUT DC Output Current ( Storage Temperature Range (T ) STG Max Junction Temperature ( Lead Temperature ...

Page 3

AC Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified Symbol Parameter t Propagation Delay LOW-to-HIGH PLH t Propagation Delay HIGH-to-LOW PHL t Output Rise Time (20% to 80%) TLH t Output Fall Time (80% to 20%) ...

Page 4

FIGURE 2. LVDS Input to LVTTL Output AC Waveforms FIGURE 3. AC Loading Circuit for LVTTL Outputs Voltage Waveforms Enable and Disable Times Note A: C includes probes and jig capacitance L Note B: All LVTTL input pulses have the ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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