gtlp6c816 Fairchild Semiconductor, gtlp6c816 Datasheet
gtlp6c816
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gtlp6c816 Summary of contents
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... GTLP6C816 GTLP-to-TTL 1:6 Clock Driver General Description The GTLP6C816 is a clock driver that provides TTL to GTLP signal level translation (and vice versa). The device provides a high speed interface between cards operating at TTL logic levels and a backplane operating at GTLP logic levels. High speed backplane operation is a direct result of GTLP’ ...
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... Functional Description The GTLP6C816 is a clock driver providing TTL-to-GTLP clock translation, and GTLP-to-TTL clock translation in the same package. The TTL-to-GTLP direction is a 1:2 clock driver path with a single Enable pin (OEB). For the GTLP-to-TTL direc- tion the clock receiver path is a 1:6 buffer with a single Enable control (OEA). Data polarity is inverting for both directions. ...
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Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( Outputs 3-STATE Outputs Active (Note 2) DC Output Sink Current into OA-Port Output Source Current from OA-Port ...
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DC Electrical Characteristics Over Recommended Operating Free-Air Temperature Range, V Symbol Test Conditions V GTLPIN IH Others V GTLPIN IL Others V GTLP REF (Note 5) GTL V GTLP TT (Note 5) GTL V V 4.75V OAn-Port ...
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AC Electrical Characteristics Over recommended range of supply voltage and operating free air temperature for OBn-Port and for OAn-Port Symbol From (Input) t TTLIN PLH t PHL t OEB PLH t ...
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Test Circuit and Timing Waveforms Test Circuit for A Outputs Note A: C includes probes and jig capacitance. L Voltage Waveforms Enable and Disable Times A-Port Voltage Waveforms Propagation Delay (V www.fairchildsemi.com Test Circuit for B Outputs Note A: C ...
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Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS ...