hip1011e Intersil Corporation, hip1011e Datasheet

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hip1011e

Manufacturer Part Number
hip1011e
Description
Dual Slot Pci Hot Plug Controllers
Manufacturer
Intersil Corporation
Datasheet

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Dual Slot PCI Hot Plug Controllers
The HIP1011D, HIP1011E are the first ICs available for
independent control of two PCI Hot-Plug slots. The
HIP1011D has all the features and functionality of two single
PCI Hot-Plug slot controllers such as the HIP1011A but in
the same foot print area. Like the single slot HIP1011B, the
HIP1011E does not monitor output voltage nor respond to
undervoltage conditions.
The HIP1011D, HIP1011E are designed to be physically
placed in close proximity to two adjacent PCI slots thus
reducing layout complexity and placement costs in
assembly. The HIP1011D, HIP1011E provides independent
power control to each slot and the addition of discrete power
MOSFETs and a few passive components creates two
complete power control solutions. The IC integrates the
+12V and -12V current sensing switches for each slot.
Overcurrent (OC) protection is provided by sensing the
voltage across external current-sense resistors. In addition,
on-chip references are used to monitor the +5V, +3.3V and
+12V outputs for undervoltage (UV) conditions *. The two
PWRON inputs control the state of the switches, one each
for slot A and slot B outputs. During an OC condition on any
output, or a UV condition on the +5V, +3.3V or +12V outputs
*, a LOW (0V) is asserted on the associated FLTN output
and all associated switches are latched-off. The outputs
servicing the adjacent slot are unaffected.
The time to FLTN signal going LOW and MOSFET latch off
is user determined by a single capacitor from each FLTN pin
to ground. This added feature enables the HIP1011D,
HIP1011E to ignore system noise transients. The FLTN latch
is cleared when the PWRON input is toggled low again.
During initial power-up of the main VCC supply (+12V), the
PWRON input is inhibited from turning on the switches, and
the latch is held in the Reset state until the VCC input is
greater than 10V.
User programmability of the overcurrent threshold and turn-
on slew rate is provided. A resistor connected to the OCSET
pin programs the overcurrent threshold for both slots.
Capacitors connected to the gate pins set the turn-on rate.
* UV references do not apply to HIP1011E.
®
1
Data Sheet
1-888-INTERSIL or 321-724-7143
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Independent Power Control of 2 PCI Slots
• Turn-Off Delay Time Adjustability
• Internal MOSFET Switches for +12V and -12V Outputs
• PP Interface for On/Off Control and Fault Reporting
• Adjustable Overcurrent Protection for All Eight Supplies
• Provides Fault Isolation
• Adjustable Turn-On Slew Rate
• Minimum Parts Count Solution
• No Charge Pump
• 100ns Response Time to Overcurrent
• Pb-Free Available (RoHS Compliant)
Applications
• PCI Hot-Plug
Ordering Information
Pinout
HIP1011DCA*
HIP1011DCAZA*
(See Note)
HIP1011ECA*
HIP1011ECAZA*
(See Note)
* Add “-T” suffix for tape and reel option.
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination finish,
which are RoHS compliant and compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at Pb-free
peak reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020C.
November 18, 2004
PART NUMBER
All other trademarks mentioned are the property of their respective owners.
Copyright © Intersil Americas Inc. 1999, 2000, 2004. All Rights Reserved
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
PWRON_2
PWRON_1
M12VO_2
M12VG_2
M12VG_1
M12VO_1
FLTN_2
12VG_2
12VO_2
12VO_1
12VG_1
FLTN_1
OCSET
HIP1011D, HIP1011E (SSOP)
VSS
HIP1011D, HIP1011E
RANGE (°C)
10
11
12
13
14
0 to 70
0 to 70
0 to 70
0 to 70
1
2
3
4
5
6
7
8
9
TEMP.
TOP VIEW
28 Ld SSOP
28 Ld SSOP
(Pb-free)
28 Ld SSOP
28 Ld SSOP
(Pb-free)
PACKAGE
28
27
26
25
24
23
22
21
20
19
18
17
16
15
M12VIN_2
3VISEN_2
3VS_2
5VISEN_2
5VS_2
3V5VG_2
12VIN_2
12VIN_1
3V5VG_1
5VS_1
5VISEN_1
3VS_1
3VISEN_1
M12VIN_1
FN4725.5
M28.15
M28.15
M28.15
M28.15
DWG. #
PKG.

Related parts for hip1011e

hip1011e Summary of contents

Page 1

... Data Sheet Dual Slot PCI Hot Plug Controllers The HIP1011D, HIP1011E are the first ICs available for independent control of two PCI Hot-Plug slots. The HIP1011D has all the features and functionality of two single PCI Hot-Plug slot controllers such as the HIP1011A but in the same foot print area ...

Page 2

... C1 M12VO_1 M12VIN_2 M12G_2 C2 M12VO_2 12VIN_1 12VG_1 C3 12VO_1 12VIN_2 12VG_2 C4 12VO_2 FROM PWRON_1 SYSTEM CONTROLLER PWRON_2 -12V 12V 2 HIP1011D, HIP1011E SLOT 1 HIP1011D, HIP1011E OCSET VSS FLTN_1 FLTN_2 OPT. OPT SYSTEM CONTROLLER SLOT 2 FIGURE 1. 5V 3.3V 5VISEN_1 R1 5VS_1 Q1 3V5VG_1 3V5VG_2 Q2 5VS_2 R2 5VISEN_2 3VISEN_1 ...

Page 3

... Simplified Schematic (1/2 HIP1011D, HIP1011E) SET (LOW = FAULT) 12V IN 12V IN 12V IN 5V REF 5V ZENER REFERENCE 12V IN LOW WHEN 12V 12V IN POWER-ON RESET 12V IN 100µA V OCSET OCSET 12V IN PWRON GND 3 HIP1011D, HIP1011E 5V REF FAULT LATCH RESET TIED HIGH IN HIP1011D TIED LOW IN HIP1011E ...

Page 4

... Overcurrent Set 5 VSS Ground 4 HIP1011D, HIP1011E DESCRIPTION -12V Supply Input. Also provides power to the -12V overcurrent circuitry. 5V CMOS Fault Output; LOW = FAULT. An optional capacitor may be placed from this pin to ground to provide additional immunity from power supply glitches. Drive the gates of the 3.3V and 5V MOSFETs. Connect a capacitor to ground to set the startup ramp ...

Page 5

... V High OUT Gate Output Charge Current Gate Turn-On Time (PWRON High to 3V5VG = 11V) Gate Turn-Off Time 5 HIP1011D, HIP1011E Thermal Information Thermal Resistance (Typical, Note 1) SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C -0.5V to +0.5V Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C M12VIN Maximum Lead Temperature (Soldering 10s 300°C ...

Page 6

... Overcurrent Fault Response Time PWRON Threshold Voltage FLTN Output Low Voltage FLTN Output High Voltage FLTN Output Latch Threshold 12V Power On Enable Threshold 12V Power On Reset Threshold 6 HIP1011D, HIP1011E = 12V, M12V = -12V 70°C, Unless Otherwise Specified (Continued SYMBOL ...

Page 7

... Introduction The HIP1011D and HIP1011E are the first dual PCI slot IC devices designed to provide control and protection of the four PCI power supplies independently to two PCI slots. Like the widely used HIP1011 this device complies with the PCI Hot Plug specification facilitating the service, upgrading or expansion of PCI based servers without the need to power down the server ...

Page 8

... OCSET Time Delay to Latch-Off Time delay to latch-off allows for a predetermined delay from the HIP1011D the HIP1011E event to the simultaneous latch-off of all four supply switches of the affected slot. This delay period is set by the capacitance value to ground from the FLTN pins for each slot ...

Page 9

... TEMPERATURE (°C) FIGURE TRIP vs TEMPERATURE (HIP1011D only) 6 +12V BIAS TEMPERATURE (°C) FIGURE 8. BIAS CURRENT vs TEMPERATURE 9 HIP1011D, HIP1011E 1000 4.632 4.631 900 4.630 800 4.629 ON 4.628 700 4.627 600 4.626 FIGURE 5. UV TRIP vs TEMPERATURE (HIP1011D only) ...

Page 10

... FIGURE 10. +12V OVERCURRENT LEVEL vs TEMPERATURE 102 101 100 TEMPERATURE (°C) FIGURE 12. OCSET CURRENT vs TEMPERATURE FIGURE 14. OVERCURRENT AND UNDERVOLTAGE TO FLTN RESPONSE TIME vs TEMPERATURE 10 HIP1011D, HIP1011E (Continued) 0.4 0.3 0.2 0.1 0 FIGURE 11. -12V OVERCURRENT vs TEMPERATURE 2.4 2.35 2.3 2.25 2.2 FIGURE 13. FLTN LATCH-OFF THRESHOLD VOLTAGE vs ...

Page 11

... LOAD CARDS HIP1011D FIGURE 15. CORRECT INSTALLATION OF LOAD CARDS * The HIP1011DEVAL board is supplied with a HIP1011D installed and in addition a loose packed HIP1011E. 11 HIP1011D, HIP1011E Evaluating Time Delay to Latch-Off Provided for delay to latch-off evaluation are 2 locations for SMD capacitors, C7 and C8 ...

Page 12

... EACH SLOT CONTROLLER TURNS ON INTO LOAD CARD VG FLTN VOLTAGE (2V/DIV) FIGURE 20. FLTN TO 35VG DELAY VG FLTN VOLTAGE (2V/DIV) FIGURE 22. FLTN TO 35VG DELAY 12 HIP1011D, HIP1011E (Continued) SUPPLY CURRENT CH3 CH2 ENABLE 1 TIME (100ms/DIV) CH1 AND CH2 VOLTAGE (5V/DIV) CH3 CURRENT (2A/DIV) FIGURE 19. HIP1011DEVAL1 3.3V SUPPLY CURRENT AS FLTN TIME (1µ ...

Page 13

... FLTN_2 FIGURE 24. Intersil, HIP1011DCB or HIP1011ECB Dual PCI HotPlug Controller HUF76132SK8 (or equivalent), 11.5m:, 30V, 11.5A Logic Level N-Channel MOSFET Dale, WSL-2512 5m: Metal Strip Resistor 0.033PF 805 Chip Capacitor 6k: 805 Chip Resistor Place provided for 805 Chip Cap 470: 805 Chip Resistors ...

Page 14

... RL2 5.0V Load Board Resistor RL3 +12V Load Board Resistor RL4 -12V Load Board Resistor CL1, CL2 +3.3V and +5.0V Load Board Capacitors CL3, CL4 +12V and -12V Load Board Capacitors 14 HIP1011D, HIP1011E COMPONENT DESCRIPTION 1.1:, 10W 2.5:, 10W 47:, 5W 240:, 2W 2200PF 100PF RL1 3.3V CL1 RL2 5 ...

Page 15

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 15 HIP1011D, HIP1011E M28.15 28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE M ...

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