IDT7027L IDT [Integrated Device Technology], IDT7027L Datasheet

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IDT7027L

Manufacturer Part Number
IDT7027L
Description
HIGH-SPEED 32K x 16 DUAL-PORT STATIC RAM
Manufacturer
IDT [Integrated Device Technology]
Datasheet

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©2000 Integrated Device Technology, Inc.
NOTES:
1. BUSY is an input as a Slave (M/S=V
2. BUSY and INT are non-tri-state totem-pole outputs (push-pull).
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed access
– Military: 25/35/55ns (max)
– Industrial: 25ns (max.)
– Commercial: 20/25/35/55ns (max.)
Low-power operation
– IDT7027S
– IDT7027L
Separate upper-byte and lower-byte control for bus
matching capability.
Dual chip enables allow for depth expansion without
Active: 750mW (typ.)
Standby: 5mW (typ.)
Active: 750mW (typ.)
Standby: 1mW (typ.)
I/O
I/O
BUSY
SEM
R/
CE
CE
8-15L
INT
A
UB
OE
LB
0-7L
A
14L
W
0L
1L
0L
L
L
L
L
L
L
L
(1,2)
(2)
IL
) and an output as a Master (M/S=V
Decoder
Address
R/W
CE
CE
A
OE
A
14L
0L
0L
1L
L
L
HIGH-SPEED
32K x 16 DUAL-PORT
STATIC RAM
Control
I/O
ARBITRATION
SEMAPHORE
INTERRUPT
MEMORY
ARRAY
32Kx16
LOGIC
IH
7027
).
M/S
1
(2)
external logic
IDT7027 easily expands data bus width to 32 bits or more
using the Master/Slave select when cascading more than
one device
M/S = V
M/S = V
Busy and Interrupt Flags
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
TTL-compatible, single 5V (±10%) power supply
Available in 100-pin Thin Quad Flatpack (TQFP) and 108-pin
Ceramic Pin Grid Array (PGA)
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
Control
I/O
IH
IL
for BUSY input on Slave
for BUSY output flag on Master,
Decoder
Address
A
A
CE
CE
OE
R/W
14R
0R
0R
1R
R
R
3199 drw 01
R/
UB
CE
CE
OE
LB
BUSY
A
A
SEM
INT
IDT7027S/L
I/O
I/O
14R
0R
W
R
R
0R
1R
R
R
R
8-15R
0-7R
R
(2)
R
(1,2)
.
DSC 3199/7

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IDT7027L Summary of contents

Page 1

... Industrial: 25ns (max.) – Commercial: 20/25/35/55ns (max.) Low-power operation – IDT7027S Active: 750mW (typ.) Standby: 5mW (typ.) – IDT7027L Active: 750mW (typ.) Standby: 1mW (typ.) Separate upper-byte and lower-byte control for bus matching capability. Dual chip enables allow for depth expansion without ...

Page 2

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM The IDT7027 is a high-speed 32K x 16 Dual-Port Static RAM, designed to be used as a stand-alone 512K-bit Dual-Port RAM combination MASTER/SLAVE Dual-Port RAM for 32-bit-or-more word systems. ...

Page 3

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM 10R 11R INT A ...

Page 4

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM < 0. > V -0. NOTES: 1. Chip Enable references are shown above with the actual CE 2. Port "A" ...

Page 5

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM Symbol Rating Commercial & Industrial (2) V Terminal Voltage -0.5 to +7.0 TERM with Respect to GND Temperature -55 to +125 T BIAS Under Bias T Storage -65 to +150 STG Temperature ...

Page 6

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM Symbol Parameter Test Condition Dynamic Operating , Outputs Disabled CC IL SEM = V Current IH (3) (Both Ports Active MAX ...

Page 7

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM dInput Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load Symbol Parameter READ CYCLE t Read Cycle Time RC t Address Access Time AA (3) t Chip ...

Page 8

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM ADDR ( UB, LB R/W DATA OUT BUSY OUT ( NOTES: 1. Timing depends on which signal is asserted last, CE, OE, LB, or UB. ...

Page 9

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM Symbol Parameter WRITE CYCLE t Write Cycle Time WC (3) t Chip Enable to End-of-Write EW t Address Valid to End-of-Write AW (3) t Address Set-up Time AS t Write Pulse Width ...

Page 10

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM ADDRESS OE (9,10 SEM ( ( R/W DATA OUT DATA IN ADDRESS (9,10 SEM ( ( R/W DATA ...

Page 11

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM VALID ADDRESS SEM I R/W OE NOTES and for the duration of the above timing (both ...

Page 12

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM Symbol Parameter BUSY TIMING (M/S BUSY Access Time from Address Match t BAA BUSY Disable Time from Address Not Matched t BDA BUSY Acce ss Time from Chip Enable Low ...

Page 13

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM ADDR "A" R/W "A" DATA IN "A" (1) t APS ADDR "B" BUSY "B" DATA OUT "B" NOTES ensure that the earlier of the two ports wins ...

Page 14

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM BUSY ADDR "A" and "B" CE "A" t (2) APS CE "B" BUSY "B" BUSY S ADDR "A" t APS ADDR "B" BUSY "B" NOTES: 1. All timing is the same for ...

Page 15

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM ADDR "A" "A" R/W "A" INT "B" ADDR "B" "B" OE "B" INT "B" NOTES: 1. All timing is the same for left and right ports. ...

Page 16

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM Inputs Outputs 14L CE CE BUSY ( 14R MATCH MATCH MATCH ...

Page 17

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM Busy Logic provides a hardware indication that both ports of the RAM have accessed the same location at the same time. It also allows one of the two accesses to proceed and ...

Page 18

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM perform another task and occasionally attempt again to gain control of the token via the set and test sequence. Once the right side has relinquished the token, the left side should succeed ...

Page 19

IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM IDT XXXXX A 999 Device Power Speed Type NOTE: 1. Industrial temperature range is available on selected TQFP packages in standard power. For other speeds, packages and powers contact your sales office. ...

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