IDT70T3589 Integrated Device Technology, IDT70T3589 Datasheet

no-image

IDT70T3589

Manufacturer Part Number
IDT70T3589
Description
64k X 36 Sync, 3.3v/2.5v Dual-port Ram, Interleaved I/o S
Manufacturer
Integrated Device Technology
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT70T3589S133BC
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT70T3589S133BC8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT70T3589S133BCI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT70T3589S133BCI8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT70T3589S133BFI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Features:
Functional Block Diagram
2. The sleep mode pin shuts off all dynamic inputs, except JTAG inputs, when asserted. All static inputs, i.e., PL/FTx and OPTx
©2006 Integrated Device Technology, Inc.
NOTES:
1. Address A
True Dual-Port memory cells which allow simultaneous
access of the same memory location
High-speed data access
– Commercial: 3.4 (200MHz)/3.6ns (166MHz)/
– Industrial: 3.6ns (166MHz)/4.2ns (133MHz) (max.)
Selectable Pipelined or Flow-Through output mode
Counter enable and repeat features
Dual chip enables allow for depth expansion without
additional logic
Full synchronous operation on both ports
– 5ns cycle time, 200MHz operation (14Gbps bandwidth)
– Fast 3.4ns clock to data out
– 1.5ns setup to clock and 0.5ns hold on all control, data, and
– Data input, address, byte enable and control registers
– Self-timed write allows fast cycle time
and the sleep mode pins themselves (ZZx) are not affected during sleep mode.
address inputs @ 200MHz
PL/FT
FT/PIPE
CE
CE
R/W
L
OE
0 L
1 L
17
L
L
L
BE
BE
BE
BE
is a NC for the IDT70T3599. Also, Addresses A
3L
1L
0L
2L
4.2ns (133MHz)(max.)
1/0
1/0
1
0
0a 1a
a
CLK
0b 1b
b
L
I/O
REPEAT
CNTEN
0L
A
1 7L (1)
ADS
- I/O
0c 1c
A
0L
c
L
L
3 5L
L
COL
INT
0/1
L
L
0d 1d
d
1d 0d 1c 0c 1b 0b 1a 0a
a b c d
HIGH-SPEED 2.5V
256/128/64K x 36
SYNCHRONOUS
DUAL-PORT STATIC RAM
WITH 3.3V OR 2.5V INTERFACE
Counter/
Address
CE 0 L
C E1 L
Reg.
R/ W L
ZZ
17
L
(2)
and A
16
Dout0-8_L
Dout9-17_L
Dout18-26_L
Dout27-35_L
Din_L
ADDR_L
256/128/64K x 36
are NC's for the IDT70T3589.
B
W
0
L
MEMORY
INTERRUPT
DE TE CTION
B
W
1
L
COLLISION
ARRAY
CONTROL
LOGIC
B
W
2
L
B
W
3
L
LOGIC
ZZ
B
W
3
R
1
Dout18-26_R
Dout27-35_R
Dout9-17_R
B
W
2
R
Dout0-8_R
ADDR_R
B
W
1
R
◆ ◆ ◆ ◆ ◆
B
W
0
R
Din_R
Interrupt and Collision Detection Flags
Separate byte controls for multiplexed bus and bus
matching compatibility
Dual Cycle Deselect (DCD) for Pipelined Output Mode
2.5V (±100mV) power supply for core
LVTTL compatible, selectable 3.3V (±150mV) or 2.5V
(±100mV) power supply for I/Os and control signals on
each port
Industrial temperature range (-40°C to +85°C) is
available at 166MHz and 133MHz
Available in a 256-pin Ball Grid Array (BGA), a 208-pin
Plastic Quad Flatpack (PQFP) and 208-pin fine pitch Ball
Grid Array (fpBGA)
Supports JTAG features compliant with IEEE 1149.1
Due to limited pin count JTAG is not supported on the 208-
pin PQFP package
Green parts available, see ordering information
ZZ
R
(2 )
R/ W R
0a 1a
Counter/
Address
Reg.
CE 0 R
CE1 R
0b 1b
d c b a
0c 1c
0d 1d
1d 0d
d
0/1
COL
INT
I/O
1c 0c
REPEAT
ADS
CNTEN
R
R
A
c
0R
A
0R
1 7R (1)
R
IDT70T3519/99/89S
- I/O
R
R
1b 0b
35R
b
CLK
TDO
TDI
R
1a 0a
a
1/0
1/0
1
0
5666 drw 01
,
JTAG
APRIL 2006
BE
BE
BE
BE
3R
2R
1R
0R
FT/PIPE
R/W
PL/FT
OE
TCK
TMS
TRST
CE
CE
R
R
0R
1R
R
R
,
DSC 5666/9

Related parts for IDT70T3589

IDT70T3589 Summary of contents

Page 1

... Counter/ Counter/ ADDR_R ADDR_L Address Address Reg. INTERRUPT COLLISION CTION LOGIC ( CONTROL LOGIC and A are NC's for the IDT70T3589 IDT70T3519/99/89S FT/PIPE 1 R/W ...

Page 2

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Description: The IDT70T3519/99/ high-speed 256/128/64K x 36 bit synchronous Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. ...

Page 3

... (1) TCK NC NC 17R NOTES: 1. Pin for IDT70T3599 and IDT70T3589. 2. Pin for IDT70T3589. 3. All V pins must be connected to 2.5V power supply All V pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to V DDQ set to V (0V). ...

Page 4

... I/O 34R I/O 52 34L NOTES: 1. Pin for IDT70T3599 and IDT70T3589. 2. Pin for IDT70T3589. 3. All V pins must be connected to 2.5V power supply All V pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to V DDQ 5. All V pins must be connected to ground supply. ...

Page 5

... PL COL V I/O SS 35L R R NOTES: 1. Pin for IDT70T3599 and IDT70T3589. 2. Pin for IDT70T3589. 3. All V pins must be connected to 2.5V power supply All V pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to V DDQ set to V (0V). ...

Page 6

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Pin Names Left Port Right Port Chip Enables (Input R/W R/W Read/Write Enable (Input Output Enable ...

Page 7

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Truth Table I—Read/Write and Enable Control CLK ↑ ↑ ↑ X ...

Page 8

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Recommended Operating Temperature and Supply Voltage Commercial Industrial NOTES: 1. This is the parameter TA. This is the "instant on" case temperature. Recommended DC Operating Conditions with V Symbol NOTES: ...

Page 9

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Absolute Maximum Ratings Symbol Rating V V Terminal Voltage TERM with Respect to GND DD ( Terminal Voltage TERM DDQ (V ) with Respect to ...

Page 10

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol Parameter CE and CE I Dynamic Operating DD L Current (Both Outputs Disabled, (1) Ports Active ...

Page 11

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM AC Test Conditions (V Input Pulse Levels (Address & Controls) Input Pulse Levels (I/Os) Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load DATA OUT ∆ tCD ...

Page 12

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM AC Electrical Characteristics Over the Operating Temperature Range (Read and Write Cycle Timing) Symbol (1) t Clock Cycle Time (Flow-Through) CYC1 (1) t Clock Cycle Time (Pipelined) CYC2 (1) t ...

Page 13

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Read Cycle for Pipelined Operation (1,2) (FT/PIPE = CYC2 t CH2 CLK ...

Page 14

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of a Multi-Device Pipelined Read t CYC2 t t CH2 CL2 CLK ADDRESS (B1 0(B1) DATA OUT(B1) ...

Page 15

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Left Port Write to Pipelined Right Port Read CLK "A" R/W "A" ADDRESS "A" MATCH ...

Page 16

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Pipelined Read-to-Write-to-Read (2) ( CYC2 t CH2 CLK ...

Page 17

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Flow-Through Read-to-Write-to-Read ( CYC1 t t CH1 CL1 CLK BEn W ...

Page 18

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Pipelined Read with Address Counter Advance t CYC2 t t CH2 CLK ADDRESS SAD HAD ADS CNTEN ( ...

Page 19

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Write with Address Counter Advance (Flow-through or Pipelined Inputs) t CYC2 t CH2 CLK ADDRESS (3) INTERNAL An ADDRESS t t SAD ...

Page 20

... NC for IDT70T3599, therefore Interrupt Addresses are 1FFFF and 1FFFE A17 and A16 are NC's for IDT70T3589, therefore Interrupt Addresses are FFFF and FFFE Address is for internal register, not the external bus, i.e., address needs to be qualified by one of the Address counter control signals. ...

Page 21

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Waveform of Collision Timing Both Ports Writing with Left Port Clock Leading CLK L t OFS ( ADDRESS L COL L CLK R t ...

Page 22

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform - Entering Sleep Mode R/W Timing Waveform - Exiting Sleep Mode R/W OE DATA OUT (4) NOTES IH. 2. All timing is same ...

Page 23

... SRAM location. If the interrupt function is not used, address locations 3FFFE and 3FFFF (1FFFF or 1FFFE for IDT70T3599 and FFFF or FFFE for IDT70T3589) are not used as mail boxes, but as part of the random access memory. Refer to Truth Table III for the interrupt operation. ...

Page 24

... A is for IDT70T3519 for IDT70T3599 IDT70T3519/99/ Control Inputs IDT70T3519/99/ Control Inputs Figure 4. Depth and Width Expansion with IDT70T3519/99/89 is for IDT70T3589. 16 6.42 24 Industrial and Commercial Temperature Ranges BE, R/W, OE, CLK, ADS, ...

Page 25

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM JTAG Timing Specifications t JF TCK (1) Device Inputs / TDI/TMS (2) Device Outputs / TDO TRST t JRST NOTES: 1. Device inputs = All device inputs except TDI, TMS, ...

Page 26

... Identification Register Definitions Instruction Field Revision Number (31:28) IDT Device ID (27:12) IDT JEDEC ID (11:1) ID Register Indicator Bit (Bit 0) NOTE: 1. Device ID for IDT70T3599 is 0x331. Device ID for IDT70T3589 is 0x332. Scan Register Sizes Register Name Instruction (IR) Bypass (BYR) Identification (IDR) Boundary Scan (BSR) System Interface Parameters ...

Page 27

IDT70T3519/99/89S High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM Ordering Information XXXXX A 999 A IDT Device Power Speed Package Type NOTES: 1. 166MHz I-Temp is only available in the BC-256 package. 2. 200Mhz is only available in the ...

Page 28

... Changed FTx/PLx to PLx/FTx on diagrams and Notes. 04/10/06: Page 1,3 & 12 CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 The IDT logo is a registered trademark of Integrated Device Technology, Inc. and t specs in AC Electrical Characteristics table INS INR symbol and parameter to AC Electrical Characteristics table ...

Related keywords