IDT70V3589 IDT [Integrated Device Technology], IDT70V3589 Datasheet
IDT70V3589
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IDT70V3589 Summary of contents
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... A 0L REPEAT L ADS L CNTEN L NOTE for IDT70V3589. 16 ©2003 Integrated Device Technology, Inc. HIGH-SPEED 3.3V 128/64K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Separate byte controls for multiplexed bus and bus matching compatibility Dual Cycle Deselect (DCD) for Pipelined Output mode LVTTL- compatible, 3.3V (± ...
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... PL I/O SS 35L R NOTES for IDT70V3589 All V pins must be connected to 3.3V power supply All V pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to V DDQ set to V (0V All V pins must be connected to ground supply. ...
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... NC 35L TCK NOTES for IDT70V3589 All V pins must be connected to 3.3V power supply All V pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to V DDQ set to V (0V All V pins must be connected to ground supply. ...
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... I/O 33L I/O 51 34R 52 I/O 34L NOTES: 1. A16 for IDT70V3589. 2. All V pins must be connected to 3.3V power supply All V pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to V DDQ 4. All V pins must be connected to ground supply Package body is approximately 28mm x 28mm x 3.5mm. ...
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... TMS Test Mode Select Reset (Initialize TAP Controller) TRST Industrial and Commercial Temperature Ranges Names (5) (4) (5) (2) NOTES for IDT70V3589. (2,3) 16 DDQX OPT , and (2) applying inputs on the I/Os and controls for that port. 3. OPT selects the operating voltage levels for the I/Os and controls on that port. ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Truth Table I—Read/Write and Enable Control CLK ↑ ↑ ↑ ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Recommended Operating Temperature and Supply Voltage Ambient Grade Temperature Commercial + Industrial - + NOTES: 1. This is the ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM (1) Capacitance (T = +25° 1.0MH ) PQFP ONLY A Z Symbol Parameter Conditions C Input Capacitance IN (3) C Output Capacitance OUT NOTES: 1. These parameters are ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol Parameter I Dynamic Operating CE and Current (Both Outputs Disabled, Ports Active ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM AC Test Conditions (V Input Pulse Levels (Address & Controls) Input Pulse Levels (I/Os) Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load 50Ω DATA OUT Figure ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM AC Electrical Characteristics Over the Operating Temperature Range (Read and Write Cycle Timing) Symbol t Clock Cycle Time (Flow-Through) CYC1 (1) t Clock Cycle Time (Pipelined) CYC2 t Clock High ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Read Cycle for Pipelined Operation (2) (FT/PIPE = CH2 CLK ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of a Multi-Device Pipelined Read t CYC2 t t CH2 CL2 CLK ADDRESS (B1 0(B1) DATA OUT(B1) ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Left Port Write to Pipelined Right Port Read CLK "A" R/W "A" ADDRESS "A" MATCH ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Pipelined Read-to-Write-to-Read (2) ( CYC2 t t CH2 CLK ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Flow-Through Read-to-Write-to-Read ( CYC1 t t CH1 CLK BEn ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Pipelined Read with Address Counter Advance t CYC2 t t CH2 CL2 CLK ADDRESS SAD HAD ADS CNTEN (2) Qx ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Write with Address Counter Advance (Flow-through or Pipelined Inputs) t CYC2 t CH2 CLK ADDRESS An (3) INTERNAL ADDRESS t t SAD HAD ...
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... Control Inputs IDT70V3599/89 Control Inputs NOTE for IDT70V3599 for IDT70V3589 Depth and Width Expansion The IDT70V3599/89 features dual chip enables (refer to Truth Table I) in order to facilitate rapid and simple depth expansion with no requirements for external logic. Figure 4 illustrates how to control the various chip enables in order to expand two devices in depth ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM JTAG Timing Specifications t JF TCK (1) Device Inputs / TDI/TMS (2) Device Outputs / TDO TRST t JRST NOTES: 1. Device inputs = All device inputs except TDI, TMS, ...
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... High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Identification Register Definitions Instruction Field Revision Number (31:28) IDT Device ID (27:12) IDT JEDEC ID (11:1) ID Register Indicator Bit (Bit 0) NOTE: 1. Device ID for IDT70V3589 is 0x0313. Scan Register Sizes Register Name Instruction (IR) Bypass (BYR) Identification (IDR) Boundary Scan (BSR) System Interface Parameters ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Ordering Information IDT XXXXX A 999 Device Power Speed Type IDT Clock Solution for IDT70V3599/89 Dual-Port Dual-Port I/O Specitications IDT Dual-Port Part Number Voltage 70V3599/89 3.3/2 Package Process/ ...
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IDT70V3599/89S High-Speed 3.3V 128/64K x 36 Dual-Port Synchronous Static RAM Datasheet Document History: 6/2/00: Initial Public Offering 7/12/00: Added mux to functional block diagram 7/30/01: Page 20 Changed maximum value for JTAG AC Electrical Characteristics for t Page 9 Added ...