IDT7202LA Integrated Device Technology, Inc., IDT7202LA Datasheet

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IDT7202LA

Manufacturer Part Number
IDT7202LA
Description
Manufacturer
Integrated Device Technology, Inc.
Datasheet

Specifications of IDT7202LA

Case
DIP24

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The IDT logo is a trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FEATURES:
• First-In/First-Out dual-port memory
• 256 x 9 organization (IDT7200)
• 512 x 9 organization (IDT7201)
• 1K x 9 organization (IDT7202)
• Low power consumption
• Ultra high speed—12ns access time
• Asynchronous and simultaneous read and write
• Fully expandable by both word depth and/or bit width
• Pin and functionally compatible with 720X family
• Status Flags: Empty, Half-Full, Full
• Auto-retransmit capability
• High-performance CEMOS
• Military product compliant to MIL-STD-883, Class B
• Standard Military Drawing #5962-87531, 5962-89666,
• Industrial temperature range (-40oC to +85oC) is
FUNCTIONAL BLOCK DIAGRAM
1996 Integrated Device Technology, Inc.
Integrated Device Technology, Inc.
— Active: 770mW (max.)
—Power-down: 2.75mW (max.)
5962-89863 and 5962-89536 are listed on this function
available, tested to military electrical specifications
W
XI
R
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
technology
CONTROL
CONTROL
WRITE
READ
CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9, 1K x 9
EXPANSION
LOGIC
LOGIC
FLAG
POINTER
WRITE
THREE-
STATE
BUFFERS
5.03
DATA OUTPUTS
DESCRIPTION:
and empty data on a first-in/first-out basis. The devices use
Full and Empty flags to prevent data overflow and underflow
and expansion logic to allow for unlimited expansion capability
in both word size and depth.
use of ring pointers, with no address information required to
load and unload data. Data is toggled in and out of the devices
through the use of the Write (
control and parity bits at the user’s option. This feature is
especially useful in data communications applications where
it is necessary to use a parity bit for transmission/reception
error checking. It also features a Retransmit (
that allows for reset of the read pointer to its initial position
when
beginning of data. A Half-Full Flag is available in the single
device mode and width expansion modes.
speed CMOS technology.
applications requiring asynchronous and simultaneous read/
writes in multiprocessing and rate buffer applications. Military
grade product is manufactured in compliance with the latest
revision of MIL-STD-883, Class B.
DATA INPUTS
The IDT7200/7201/7202 are dual-port memories that load
The reads and writes are internally sequential through the
The devices utilizes a 9-bit wide data array to allow for
The IDT7200/7201/7202 are fabricated using IDT’s high-
(D –D
(Q –Q
1024 x 9
ARRAY
256 x 9
512 x 9
RAM
0
0
RT
8
8
is pulsed low to allow for retransmission from the
EF
XO
)
FF
)
/
HF
POINTER
READ
RESET
LOGIC
FL
RS
/
RT
W
They are designed for those
) and Read (
2679 drw 01
DECEMBER 1996
R
IDT7201LA
IDT7202LA
) pins.
IDT7200L
RT
) capability
DSC-2679/7
1

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