IDT7381 ETC-unknow, IDT7381 Datasheet

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IDT7381

Manufacturer Part Number
IDT7381
Description
16-bit Cmos Cascadable
Manufacturer
ETC-unknow
Datasheet

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FEATURES:
COMMERCIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
IDT7381
16-BIT CASCADABLE ALU
c
FUNCTIONAL BLOCK DIAGRAM
High-performance 16-bit Arithmetic Logic Unit (ALU)
25ns to 55ns clocked ALU operations
Ideal for radar, sonar or image processing applications
74S381 instruction set (8 functions)
Replaces Gould S614381 or Logic Devices L4C381
Cascadable with or without carry look-ahead
Pipeline or flow-through modes
Internal feedback path for accumulation
Three-state outputs
TTL-compatible
Produced with advanced submicron CMOS technology
Available in PLCC
Speeds available: L/25/30/40/55
2001 Integrated Device Technology, Inc.
OVF
EN F
E N A
FTF
OE
C
G
1 6
P
Z
16-BIT CMOS
CASCADABLE ALU
A
A R EG
0 - 15
16
A M U X
R M U X
0000 H
16-BIT AL U
F M UX
F
0 - 15
F RE G
1
0000 H
16
DESCRIPTION:
These three-bus devices have two input registers, an ultra-fast 16-bit ALU
and 16-bit output register. With IDT’s high-performance CMOS technology,
the IDT7381 can do arithmetic or logic operations in 25ns. The IDT7381
functionally replaces four 54/74S381 four-bit ALUs in a 68-pin package.
flexible pipelining. The F output can also be set into clocked or flow-through
mode. An output enable is provided for three-state control of the output port
on a bus.
operations. The two R and S selection pins determine whether A, B, F or
0 are fed into the ALU. This ALU has carry-out, propagate and generate
outputs for cascading using carry look-ahead.
S M U X
The IDT7381 is a high-speed cascadable Arithmetic Logic Unit (ALU).
The two input operands, A and B, can be clocked or fed through for
The IDT7381 has three function pins to select 1 of 8 arithmetic or logic
B M U X
B R EG
B
SU P P LY
PO W E R
0 - 1 5
16
3
2
CL K
E N B
FT AB
RS
I
C
G N D
V
COMMERCIAL TEMPERATURE RANGE
0 - 2
C C
0
0 - 1
APRIL 2001
IDT7381
DSC-2525/-

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IDT7381 Summary of contents

Page 1

... An output enable is provided for three-state control of the output port on a bus. The IDT7381 has three function pins to select arithmetic or logic operations. The two R and S selection pins determine whether are fed into the ALU. This ALU has carry-out, propagate and generate outputs for cascading using carry look-ahead ...

Page 2

... IDT7381 16-BIT CASCADABLE ALU PIN CONFIGURATION FTF ...

Page 3

... IDT7381 16-BIT CASCADABLE ALU PIN DESCRIPTION Pin Name I Sixteen–bit data input port Sixteen–bit data input port Register enable for the A input port; active low pin. ENA I Register enable for the B input port; active low pin. ...

Page 4

... IDT7381 16-BIT CASCADABLE ALU ABSOLUTE MAXIMUM RATINGS Symbol Description V Terminal Voltage with TERM Respect to Ground V Power Supply Voltage CC T Storage Temperature STG I DC Output Current OUT NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT- INGS may cause permanent damage to the device. This is a stress rating ...

Page 5

... IDT7381 16-BIT CASCADABLE ALU POWER SUPPLY CHARACTERISTICS Commercial 0°C to +70° 5.0V ± Symbol Parameter I Quiescent Power Supply Current CC ∆I Quiescent Power Supply Current (3) CC TTL Input HIGH I Dynamic Power Supply Current (4) CCD I Dynamic Power Supply Current CCD1 I Dynamic Power Supply Current ...

Page 6

... IDT7381L55 Z,OVF — — — — — — ...

Page 7

... A IDT7381L40 IDT7381L55 Set-up Hold Set-up Hold IDT7381L40 IDT7381L55 IDT7381L40 IDT7381L55 Unit Unit ...

Page 8

... IDT7381 16-BIT CASCADABLE ALU WAVEFORMS FOR FTAB = 0, FTF = X CLK DATA DATA DATA ENA, ENB DATA 1 ENF (FTF = 0) Prop (FTF = 1) Prop Prop OVF Prop Prop. 1: Propagation delay with respect to the CLK. ...

Page 9

... IDT7381 16-BIT CASCADABLE ALU WAVEFORMS FOR FTAB = 1, FTF = X CLK (FTF = DATA DATA DATA DATA 1 ENF (FTF = (FTF = OVF C 16 Prop. 1: Propagation delay with respect to the CLK. ...

Page 10

... IDT7381 16-BIT CASCADABLE ALU PROPAGATION DELAY CALCULATIONS FOR TWO IDT7381S From Input F FTAB = 0, FTF = 0 CLK As in 16-bit case – – – – 15 ENA, ENB,ENF . . . . FTAB = 0, FTF = 1 (Clk → C → F CLK ) + ( → C → ...

Page 11

... Notice that the immediate upper device from device i. Adding the delays t Propagation delay = t inputs of each device 0 Total Delay As seen from Figure 8, the propagation delay is within the IDT7381 , I , Clk, FTF, FTAB, 0–1 0–2 devices only. A complete analysis should also include the delay associated with the transmission line Li (which depends on the line length and its impedance) ...

Page 12

... T738 n 82/A Looka head G ene rator Figure 3. Cascading Three IDT7381s to 48 Bits Wide with a Carry-lookahead Generator 12 COMMERCIAL TEMPERATURE RANGE Clk ENF, FTF, FTAB LSD ...

Page 13

... IDT7381 16-BIT CASCADABLE ALU Reg A Reg 16-Bit ALU Reg Reg 16-Bit ALU ...

Page 14

... IDT7381 16-BIT CASCADABLE ALU 16-Bit ALU Reg 16-Bit ALU Figure 6. 32-Bit Configuration for FTAB = 1, FTF = 0 ...

Page 15

... IDT7381 16-BIT CASCADABLE ALU D n OUTPUT — t — TEST CONDITIONS Input Rise levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load — t — 2 Figure 8. Propagation Delay = N-Cascaded Devices GND to 3V 3ns 1.5V 1.5V Figure 1 ...

Page 16

... IDT7381 16-BIT CASCADABLE ALU TEST CIRCUITS FOR ALL OUTPUTS OUT V IN Pulse D.U.T. Generator R T SET-UP, HOLD, AND RELEASE TIMES DATA INPUT t SU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR t SU CLOCK ENABLE ETC. PROPAGATION DELAY SAME PHASE ...

Page 17

... IDT7381 16-BIT CASCADABLE ALU ORDERING INFORMATION ID T XXXX XX Device Type Speed CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 X Package 7381L for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 17 COMMERCIAL TEMPERATURE RANGE Plastic Leaded Chip C arrier (J68-1) Speed Grade 16-Bit ALU for Tech Support: logichelp@idt ...

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