IDT77252 Integrated Device Technology, Inc., IDT77252 Datasheet
IDT77252
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IDT77252 Summary of contents
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... Meets Power Management specification. • Automatic AAL5 padding. • UNI 3.1, TM 4.0 compliant. • Pin compatible with IDT 77211 SAR PIA Bus IDT77252 Tx UTO PIA Bus 155Mbps ABR SAR U tility B us 80.0M HZ OSC. EEPROM PRELIMINARY INFORMATION IDT77252 8 2 155Mbps 4057 drw 01 JUNE 2000 DSC-4057/7 ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus DESCRIPTION ™ The IDT77252 NICStAR is a member of IDT's family of products for Asynchronous Transfer Mode (ATM) networks. The ABR SAR performs both the ATM Adaptation Layer (AAL) Segmentation and Reassembly (SAR) function and the ATM layer protocol functions ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus PACKAGE PINOUT 208 Vcc AD(31) 2 Index AD(30) 3 AD(29) 4 AD(28) 5 AD(27) 6 AD(26) 7 GND 8 GND 9 AD(25) 10 AD(24) 11 C/BE(3) 12 IDSEL 13 AD(23) 14 AD(22) 15 GND 16 GND 17 AD(21) 18 Vcc 19 AD(20) 20 AD(19) 21 AD(18) ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus PACKAGE DRAWING 208 Index 1 0.02 ±0.004 (0.5 ±0.1) 0.008 ±0.004 (0.2 ±0. 0.013 ±0.002 (0.33 ±0.06) COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE 1.228 ±0.016 (31.2 ±0.4) 1.10 ±0.004 (28.0 ±0.1) ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus PIN DEFINITIONS Pin # Name I (31) I (30) I (29) I (28) I (27) I (26) I (25) I (24) I (3) I (23) I (22) I (21) I (20) I (19) I (18) I (17) I (16) I (2) I I/O 30 I/O 31 I/O 32 I/O ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus PIN DEFINITIONS (CON’T.) Pin # Name I/O COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE Bus Name line ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus PIN DEFINITIONS (CON’T.) Pin # Name I/O ( I/O 111 I/O ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus PIN DEFINITIONS (CON’T.) Pin # Name I (4) I (5) I (6) I (7) I ata ( ata ( ata ( ata ( ata ( ata ( ata ( ata ( arity COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus PIN DEFINITIONS (CON’T.) Pin # Name I COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE Bus Name utp tris ivid inp ut cha yste clo sig na l fro ite PRELIMINARY Description ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus ABSOLUTE MAXIMUM RATINGS Symbol V Supply Voltage CC V Input Voltage IN V Output Voltage OUT T Storage Temperature stg RECOMMENDED OPERATING CONDITIONS Symbol V Supply Voltage CC V Input Voltage I T Commerical operating temperature ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus DC OPERATING CONDITIONS Symbol Parameter Vil Low -le vel TTL input voltage Vih High-le vel TTL input voltage Vol Low -level TTL output voltage Vol PCI Bus Low -level TTL output voltage ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus AC OPERATING CONDITIONS AC TEST CONDITIONS Input Pulse Lev els Input R ise/Fall Tim es Input Tim ing R eference Lev els O utput R eference Lev els AC Test Load 50 I NAND TREE The NAND Chain provides a simple test to verify that all bond wires are installed correctly and that all pads are correctly soldered on a PCB ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus NAND TREE PIN ORDER Pin Signal Name Number CLK_OUT 198 203 CLK 204 205 206 AD[31] 2 AD[30] 3 AD[29] 4 AD[28] 5 AD[27] 6 AD[26] 7 AD[25] 10 AD[24 [ AD[23] 14 AD[22] 15 AD[21] ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus PCI BUS (SEE FIGURE 1& 2) Sym b ol tval utput S ignal Valid D e lay : - tva l(ptp utput S ig nal Va lid D elay ton ignal A ct ive D elay 31- ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus UTOPIA BUS (SEE FIGURE 3) Symbol fro tup Tim Tim e fro utp ut Va lid fro tup Tim Tim e fro tup Tim Tim e fro meet tim ing s pecific ation (A f-phy-001 7.00) ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus SRAM BUS WRITE CYCLE (SEE FIGURE 6) Sym 8-0) S etup Tim falling edge ulse _I/O (3 1-0) S etup Tim _I/O (31 -0) Hold Tim e from t6 P ulse SRAM BUS READ CYCLE (SEE FIGURE 7) ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus ton tval (I) PCI_CLK Add (O) AD31-0 (O) Cmd C/ 3-0 (O) FRAME ton (O) tval IRDY (I) DEVSEL (I) TRDY (O) REQ ton (O) PAR (I) Figure 1. The ABR SAR as a PCI master (illustrates a 4-word write by the ABR SAR to host memory) ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus tsu (1) PCI_CLK (1) AD31-0 (1) C/ 3-0 (1) PAR (1) FRAME th (1) IRDY (1) DEVSEL (O) TRDY (O) PERR (O) SERR (1) tsu (O) tval (illustrates a 4-word write operation by the host device driver to the ABR SAR ) ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus t1 (I) PHY_Clk t2 (O) TxClk,RxClk (O) TxData 7-0 (O) TxSOC (O) TxEnb (O) TxParity (I) Txfull/ TxCLAV (O) RxEnb (I) RxData 7-0 (I) RxSOC (I) RxEmpty/ RxCLAV COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE Figure 3. UTOPIA Bus Timing ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus (O) UTL_ALE (O) UTL_CS0/1 (O) UTL_WR (I/O) UTL_AD(7-0) UTL_ALE UTL_CS0/1 UTL_RD UTL_AD7-0 tw11 tw1 tw6 tw7 tw8 tw3 tw2 tw4 Address (O) Figure 4. Utility Bus Write Cycle tr11 tr1 tr8 ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus SR_A(18-0) SR_CS SR_WE SR_I/O(31-0) SR_A(18-0) SR_CS SR_OE SR_I/O(31-0) SR-A (18-0) E_CE SR_I/O(7-0) COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE Figure 6. SRAM Bus Write Cycle Timing t1 t2 Figure 7. SRAM Bus Read Cycle Timing ...
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... IDT sales representative for a vendor list, or e-mail atmhelp@idt.com. IDT offers the Sarwin2 demo driver and application suite, which can be used to evaluate the IDT77252 when used with a IDT NIC reference or evaluation adapter. It may also be used as a reference for sample source code when developing a proprietary device driver ...
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... IDT77252 155Mb/s ATM Segmentation & Reassembly (SAR) Controller with ABR for the PCI Local Bus ORDERING INFORMATION NNNNN A IDT Device Type Power Notes: 1. Refer to Errata list for revision history and how to identify revision. 2. Refer to PSC-4053 for detailed package drawing. Replacing the 77211 with the 77252: The 77252 PG package is the same package as the 77211 PQF,and the 77252 is a direct replacement to the 77211 SAR ...