ir3840 International Rectifier Corp., ir3840 Datasheet
ir3840
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ir3840 Summary of contents
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... PWM controller make IR3840 a space-efficient solution, providing accurate power delivery for low output voltage applications. IR3840 is a versatile regulator which offers programmability of start up time, switching frequency and current limit while operating in wide input and output voltage range. ...
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... PACKAGE DESIGNATOR M M 02/09/ Boot Gnd 14 Enable Seq FB COMP Gnd Rt PACKAGE PIN COUNT DESCRIPTION IR3840MTRPbF 15 IR3840MTR1PbF 15 IR3840MPbF o C and - PGnd θ θ PCB - PGood OCSet PARTS PER REEL ...
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... Block Diagram Fig. 2. Simplified block diagram of the IR3840 02/09/09 IR3840MPbF 3 ...
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... SW. Enable pin to turn on and off the device. Use two external resistors to 14 Enable set the turn on threshold (see Enable section). Connect this pin to Vcc not used. 15 Gnd Signal ground for internal reference and control circuitry. 02/09/09 IR3840MPbF Description 4 ...
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... SS=0V, No Switching, Enable low CC(Standby) I SS=3V, Vcc=5V, Fs=500kHz CC(Dyn) Enable high Vcc Rising Trip Level Vcc Falling Trip Level Supply ramping up and down Supply ramping up Supply ramping down Supply ramping up and down Enable=3.3V IR3840MPbF Max 16 5.5 5.5 0.9*Vin 12 1650 125 o <5.5V, V =12V, 0 C<T < 125 ...
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... Note4 Fs=250kHz 92 Vfb-Vseq, -10 Vseq=0. 0.40 8 Note4 7 Note4 20 Note4 100 Vcc=4.5V 3.4 Note4 0 Source 14 2.7 Fs=250kHz 20.8 Fs=500kHz 43 Fs=1500kHz 136 Note4 -10 I(Boot)=30mA 180 IR3840MPbF <5.5V, V =12V C<T < 125 TYP MAX Units 0.7 0.735 V 250 275 500 550 kHz 1500 1650 1.8 Vp-p 0 130 200 % 0 +10 ...
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... Note3: Cold temperature performance is guaranteed via correlation using statistical quality control. Not tested in production. Note4: Guaranteed by Design but not tested in production. 02/09/ Test Condition Note4 Note4 Fb Rising Relative to charge voltage, SS rising Note4 I =-5mA PGood SW=0V, Enable=0V SW=0V,Enable=high,SS=3V,Seq=0V, Note4 IR3840MPbF <5.5V, V =12V C<T < 125 Min TYP MAX 140 ...
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... IR3840MPbF C - 125 C) F =500 kHz Icc(Dyn ) - 100 ISS - 100 IOCSET (500k ...
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... ETQP4LR36WFC 0.56 0.56 ETQP4LR56WFC ETQP4LR56WFC 0.6 0.6 MPL104-0R6 MPL104-0R6 1 1 MPL105-1R0 MPL105-1R0 1 1 MPL105-1R0 MPL105-1R0 rre n t (A) 1.2V out 1.5V out 1.8V out Loa d Curre nt (A) 1.2V out 1.5V out 1.8V out IR3840MPbF DCR DCR (mΩ) (mΩ) 0.48 0.48 1.1 1.1 1.56 1.56 1.7 1.7 2.5 2.5 2.5 2 3.3V out 5V out 3.3V out 5V out 9 ...
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... For all the output voltages, L=0.3uH (DCR=0.29 mΩ, P/N: 59PR9874N 1.0 2.0 3.0 0.7Vout 1.2Vout 2.5 2.3 2.1 1.9 1.7 1.5 1.3 1.1 0.9 0.7 0.5 0.3 0 0.7Vout 1.2Vout 02/09/09 4.0 5.0 6.0 7.0 8.0 9.0 Load Current (A) 0.75Vout 0.9Vout 1.0Vout 1.5Vout 1.8Vout 2.5Vout Load Current (A) 0.75Vout 0.9Vout 1.0Vout 1.5Vout 1.8Vout 2.5Vout IR3840MPbF 10.0 11.0 12.0 1.1Vout 3.3Vout 1.1Vout 3.3Vout 10 ...
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... MOSFETs using Fig. 3a. Normal Start up, Device turns on when the Bus voltage reaches 10.2V Figure 3b. shows the recommended start-up sequence for the non-sequenced operation of IR3840, when Enable is used as a logic input. Fig. 3b. Recommended startup sequence, IR3840MPbF . This is desirable particularly in exceeds the desired output voltage level. ...
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... Figure 3c. shows the recommended startup sequence for sequenced operation of IR3840 with Enable used as logic input. Fig. 3c. Recommended startup sequence, Sequenced operation Pre-Bias Startup IR3840 is able to start up into pre-charged output, which prevents disturbances of the output voltage. The output starts in asynchronous fashion and keeps the synchronous MOSFET off until the first gate signal for control MOSFET is generated ...
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... Shutdown The IR3840 can be shutdown by pulling the Enable pin below its 1 V threshold. This will tri- state both, the high side driver as well as the low side driver. Alternatively, the output shutdown by pulling the soft-start pin below 0.3V. In shutdown by this method, the high side driver is turned off, and the low side driver is turned on ...
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... Thermal Shutdown Temperature sensing is provided inside IR3840. The trip threshold is typically set to 140 trip threshold is exceeded, thermal shutdown turns off both MOSFETs and discharges the soft start capacitor. Automatic restart is initiated when the sensed temperature drops within the operating range. o There hysteresis in the thermal shutdown threshold ...
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... TIMING DIAGRAM OF PGOOD FUNCTION Fig.9a IR3840 Non-Sequenced Operation (Seq=Vcc) 02/09/09 Fig.9b IR3840 Sequencing Operation IR3840MPbF 15 ...
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... Maximum Duty Ratio Considerations A fixed off-time of 200 ns maximum is specified for the IR3840. This provides an upper limit on the operating duty ratio at any given switching frequency clear, that higher the switching frequency, the lower is the maximum duty ratio at which the IR3840 can operate. To allow some ...
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... Equation (5) can be rewritten as For the calculated values of R8 and R9 see feedback compensation section. Fig. 11. Typical application of the IR3840 for Soft-Start Programming V in The soft-start timing can be programmed by selecting the soft-start capacitance value. From R (1), for a desired start-up time of the converter, ...
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... Where Δi ≈ 35%(I calculated to be 0.607μH. Select L=0.6 μH. ....(12) The MPL104-0R6 from Delta provides a compact, low profile inductor suitable for this application. = 4.28A. . IR3840MPbF Δ The optimum operating ripple current Δ ∗ Δ = ∗ Δ ...
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... The IR3840 can perform well with all types of capacitors rule, the capacitor must have low enough ESR to meet output ripple and load transient requirements. The goal for this design is to meet the voltage ripple requirement in the smallest possible capacitor size ...
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... III compensation network. The typically used compensation network for voltage-mode controller is shown in figure 15. Again, the transfer function is given by replacing Z .......... ....... (21) the transfer function can be expressed as IR3840MPbF = Zero Frequency of the Output Capacitor = % .......... .......... .......... 0 75 π L ...
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... F using equation (16) to compute the small signal These result to: =24.2 kHz ESR /2=300 kHz F s Select crossover frequency F Since F place the pole and zeros. IR3840MPbF ESR ESR o o Type II Type <F <F <F <F < ...
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... PGood pin, when the output voltage is not in regulation, to less than Select : C 220 pF mA. A typical value used is 4.7kΩ Select : R 130 Ω 10 kΩ Select : R 2.49 kΩ 9 IR3840MPbF ) from the SW pin OCSET R has a positive DS(on) ∗ OCSet OCSet = = I .......... .......... L ( critical ) ...
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... OCSet 0.1uF 1.87k C3 1 220pF C4 1 10000pF R8 1 3.92K R9 1 2.49K R10 1 130 C7 1 2200pF U1 1 IR3840 02/09/ 330 uF Vin Boot 0 IR3840 2.8 K OCSet Comp PGnd Gnd 220 pF Description SMD Elecrolytic, Fsize, 25V, 20% 1206, 16V, X7R, 20% 11 ...
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... Fig. 19. Start up with 1.62V Pre Bias, 0A Load Fig. 21. Inductor node at 12A load Ch :LX 3 02/09/ Fig. 20. Output Voltage Ripple, 12A : Fig. 22. Short (Hiccup) Recovery IR3840MPbF Fig. 18. Start up at 12A Load PGood load Ch ...
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... TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=1.8V, Io=0-12A, Room Temperature, No Air Flow Fig. 23. Transient Response 12A step 02/09/ out 4 out IR3840MPbF 25 ...
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... TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=1.8V, Io=12A, Room Temperature, No Air Flow Fig. 24. Bode Plot at 12A load shows a bandwidth of 109 kHz and phase margin of 51 02/09/09 IR3840MPbF degrees 26 ...
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... The inductor, output capacitors and the IR3840 should be as close to each other as possible. This helps to reduce the EMI radiated by the power traces due to the high switching currents through them. Place the input capacitor directly at the Vin pin of IR3840. ...
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... SupIRBuck, kept away from noise sources. Fig. 25c. IRDC3840 demoboard layout considerations – Mid Layer 1 Fig. 25d. IRDC3840 demoboard layout considerations – Mid Layer 2 02/09/09 IR3840MPbF PGnd Power Vin Ground Plane AGnd Use separate traces for connecting Boot cap and Rocset to the ...
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... Pad lands (the 4 big pads other than the 11 IC pins) length and width should be equal to maximum part pad length and width. However, the minimum metal to metal spacing should be no less than 0.17mm for 2 oz. Copper; no less than 0.1mm for 1 oz. Copper and no less than 0.23mm for 3 oz. Copper. 02/09/09 IR3840MPbF 29 ...
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... Ensure that the solder resist in-between the lead lands and the pad land is ≥ 0.15mm due to the high aspect ratio of the solder resist strip separating the lead lands from the pad land. 02/09/09 IR3840MPbF 30 ...
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... The maximum length and width of the land pad stencil aperture should be equal to the solder resist opening minus an annular 0.2mm pull back to decrease the incidence of shorting the center land to the lead lands when the part is pushed into the solder paste. 02/09/09 IR3840MPbF 31 ...
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... This product has been designed and qualified for the Consumer market 02/09/09 BOTTOM VIEW 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 01/09 IR3840MPbF TAC Fax: (310) 252-7903 32 ...