ISL22346 Intersil Corporation, ISL22346 Datasheet
ISL22346
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ISL22346 Summary of contents
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... Data Sheet 2 ® Low Noise, Low Power I C The ISL22346 integrates four digitally controlled potentiometers (DCP) and non-volatile memory on a monolithic CMOS integrated circuit. The digitally controlled potentiometers are implemented with a combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the ...
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... RW1 12 RL1 13 RH1 VCC 17 SHDN 18 RH0 19 RL0 20 RW0 2 ISL22346 V CC POWER-UP INTERFACE CONTROL AND STATUS LOGIC NON- VOLATILE REGISTERS GND “High” terminal of DCP3 “Low” terminal of DCP3 “Wiper” terminal of DCP3 2 Device address input for the I C interface ...
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... DCP to DCP Matching MATCH (Note 11) TC Ratiometric Temperature Coefficient V (Note 12) RESISTOR MODE (Measurements between R RINL Integral nOn-linearity (Note 16) 3 ISL22346 Thermal Information Thermal Resistance (Typical, Note 3) 20 Lead TSSOP package . . . . . . . . . . . . . . . . . . . . +0.3 CC Recommended Operating Conditions CC Temperature Range (Extended Industrial .-40°C to +125° 2.7V to 5.5V CC Power Rating of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . . .5mW Wiper Current of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . ± ...
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... Ramp Rate CC t Power-up Delay D EEPROM SPECIFICATION EEPROM Endurance EEPROM Retention 4 ISL22346 TEST CONDITIONS DCP register set between 10h and 7Fh; monotonic over all tap positions W option U option Any two DCPs at the same tap position with the same terminal voltages TEST CONDITIONS ...
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... F Cb Capacitive Loading of SDA or SCL Rpu SDA and SCL Bus Pull-up Resistor Off-chip t A2, A1 and A0 Setup Time SU:A 5 ISL22346 TEST CONDITIONS Any pulse narrower than the max spec is suppressed SCL falling edge crossing 30 until CC SDA exits the 30 window CC SDA crossing 70 ...
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... SCL t SU:STA t HD:STA SDA (INPUT TIMING) SDA (OUTPUT TIMING) A0, A1, and A2 Pin Timing START SCL SDA A0, A1 ISL22346 TEST CONDITIONS After STOP condition ) and V(R ) are V(R ) for the DCP register set to 7F hex and 00 hex respectively. LSB is the 127 × ...
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... TAP POSITION (DECIMAL) FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER MODE FOR 10kΩ (W) 1.30 10k 1.10 0.90 0.70 0.50 Vcc = 5.5V 0.30 0.10 50k -0.10 -0.30 -40 - TEMPERATURE (ºC) FIGURE 5. ZSerror vs TEMPERATURE 7 ISL22346 1.4 1.2 1 0.8 0.6 0.4 Vcc = 3.3V -40ºC 0 100 120 2.7 0 25ºC 0.1 0 -0.1 -0.2 80 100 120 FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER ...
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... TEMPERATURE (ºC) FIGURE 9. END TO END R % CHANGE vs TOTAL TEMPERATURE 300 250 10k 200 150 100 TAP POSITION (DECIMAL) FIGURE 11. TC FOR Rheostat MODE IN ppm 8 ISL22346 (Continued) 0.4 0.2 -0.2 -0.4 -0.6 96 116 FIGURE 8. INL vs TAP POSITION IN Rheostat MODE FOR 105 50k 10k 15 60 ...
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... Pin Descriptions Potentiometers Pins RHi and RLi ( The high (RHi) and low (RLi) terminals of the ISL22346 are equivalent to the fixed terminals of a mechanical potentiometer. RHi and RLi are referenced to the relative position of the wiper and not the voltage potential on the terminals ...
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... Data states on the SDA line must change only during SCL LOW periods. SDA state changes during SCL HIGH are reserved for indicating START and STOP conditions (See VOLATILE Figure 16). On power-up of the ISL22346 the SDA pin is in ACR the input mode. 2 ...
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... During the ninth clock cycle, the receiver pulls the SDA line LOW to acknowledge the reception of the eight bits of data (See Figure 17). The ISL22346 responds with an ACK after recognition of a START condition followed by a valid Identification Byte, and once again after successful receipt of an Address Byte. The ...
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... Identification Byte, a valid Address Byte, a Data Byte, and a STOP condition. After each of the three bytes, the ISL22346 responds with an ACK. At this time, the device enters its standby state (See Figure 18). Device can receive more than one byte of data by auto incrementing the address after each received byte. Note after reaching the address 08h, the internal pointer “ ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 ISL22346 M20.173 20 LEAD THIN SHRINK SMALL OUTLINE PLASTIC M ...