ISL54222 Intersil Corporation, ISL54222 Datasheet
ISL54222
Related parts for ISL54222
ISL54222 Summary of contents
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... USB host (computer). The digital logic inputs are 1.8V logic compatible when operated with a 1.8V to 3.3V supply. The ISL54222 has an output enable pin to open all the switches. It can be used to facilitate proper bus disconnect and connection when switching between the USB sources. The ISL54222 is available 1.8mmx1.4mm µ ...
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... NOTES:) ISL54222IRTZ (Note 3) 4222 ISL54222IRTZ-T* (Note 3) 4222 ISL54222IUZ (Note 3) 54222 ISL54222IUZ-T* (Note 3) 54222 ISL54222IRUEVAL1Z Evaluation Board *Please refer to TB347 for details on reel specifications. NOTES: 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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... V OFF DYNAMIC CHARACTERISTICS Turn-ON Time Turn-OFF Time OFF 3 ISL54222 Thermal Information Thermal Resistance (Typical 0.3V) DD Maximum Junction Temperature (Plastic Package +150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C V Logic Control Input Voltage . . . . . . . . . . . . . . . . . . . . . . . Analog Signal Range ...
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... Flatness is defined as the difference between maximum and minimum value of ON-resistance over the specified analog signal range. 12. r matching between channels is calculated by subtracting the channel with the highest max r ON value, between HSD2+ and HSD2- or between HSD1+ and HSD1-. 13. Limits established by characterization and are not production tested. 4 ISL54222 Test Conditions 1.4V, V OEH OEL TEST CONDITIONS = 3 ...
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... Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENT POINTS V DD LOGIC INPUT 0V SWITCH OUTPUT V OUT 0V FIGURE 2A. MEASUREMENT POINTS 5 ISL54222 t < 20ns r t < 20ns f t OFF V OUT 90% 90% Repeat test for all switches. C capacitance. FIGURE 1. SWITCHING TIMES ...
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... DIN- 90% 50% 10 10% 50% OUT+ OUT- 50% 90 FIGURE 6A. MEASUREMENT POINTS 6 ISL54222 (Continued SEL GND Signal direction through switch is reversed, worst case values are recorded. Repeat test for all switches. t skew_i 90% t skew_o |tro - tri| Delay Due to Switch for Rising Input and Rising Output Signals. ...
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... V more than -0.3V for normal operation. However, in the event that the USB 5.25V V shorted to one or both of the D-/D+ pins, the ISL54222 has special fault protection circuitry to prevent damage to the ISL54222 part. The fault circuitry allows the signal pins (D-, D+, HSD1-, HSD1+, HSD2-, HSD2 driven up to 5.5V while the V this condition the part draws < ...
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... USB 2.0 V The USB 2.0 specification in chapter 7, section 7.1.1 states a USB device must be able to withstand signal lines when the device is either powered off or powered on for at least 24 hours. The ISL54222 part has current. With special fault protection circuitry to meet these short circuit DD requirements. ...
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... V COM FIGURE 9. ON-RESISTANCE vs SWITCH VOLTAGE 5 3. 40mA COM 5.0 +85°C 4.5 4.0 +25°C 3.5 -40°C 3.0 2.5 2.0 0 0.1 0.2 V COM FIGURE 11. ON-RESISTANCE vs SWITCH VOLTAGE 9 ISL54222 T = +25°C, Unless Otherwise Specified A 3.0V 0.3 0.4 (V) 0.3 0.4 (V) 0.3 0.4 ( 1mA COM 12 1. 0.5 1.5 1.0 2.0 V (V) COM FIGURE 8. ON-RESISTANCE vs SUPPLY VOLTAGE vs ...
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... Typical Performance Curves V = 1.8V DD FIGURE 13. EYE PATTERN: 480Mbps WITH USB SWITCHES IN THE SIGNAL PATH 10 ISL54222 T = +25°C, Unless Otherwise Specified (Continued) A TIME SCALE (0.2ns/DIV) FN6835.0 February 9, 2009 ...
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... Typical Performance Curves V = 1.8V DD FIGURE 14. EYE PATTERN: 12Mbps WITH USB SWITCHES IN THE SIGNAL PATH V = 3.3V DD FIGURE 15. EYE PATTERN: 12Mbps WITH USB SWITCHES IN THE SIGNAL PATH 11 ISL54222 T = +25°C, Unless Otherwise Specified (Continued) A TIME SCALE (10ns/DIV) TIME SCALE (10ns/DIV) FN6835.0 February 9, 2009 ...
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... L - 0dBm, 0.2VDC BIAS IN -30 -40 -50 -60 -70 -80 -90 -100 -110 1k 10k 100k 1M FREQUENCY (Hz) FIGURE 18. CROSSTALK 12 ISL54222 T = +25°C, Unless Otherwise Specified (Continued) A -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 100M 1G 1k Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: ...
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... SIDE VIEW (DATUM A) PIN # BOTTOM VIEW (A1) NX (b) 5 SECTION "C-C" 2.20 1.00 1.00 0.60 0.50 1.80 0.20 0.40 10 LAND PATTERN 13 ISL54222 L10.1.8x1. LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE 10X 0. 0. NOTES: 5 (DATUM TERMINAL TIP 10 ...
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... B - 10. Datums -A - and to be determined at Datum plane . - H - 11. Controlling dimension: MILLIMETER. Converted inch dimen- sions are for reference only 14 ISL54222 M10.118 (JEDEC MO-187BA) 10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE θ 0.25 R1 (0.010 -C- 4X θ ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 15 ISL54222 L10.3x3A 2X 0.10 ...