isl5757 Intersil Corporation, isl5757 Datasheet

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isl5757

Manufacturer Part Number
isl5757
Description
10-bit, +3.3v, 260+msps, High Speed D/aconverter
Manufacturer
Intersil Corporation
Datasheet
10-bit, +3.3V, 260+MSPS, High Speed D/A
Converter
The ISL5757 is a 10-bit, 260+MSPS (Mega Samples Per
Second), CMOS, high speed, low power, D/A (digital to
analog) converter, designed specifically for use in high
performance communication systems such as base
transceiver stations utilizing 2.5G or 3G cellular protocols.
This device complements the ISL5x57 family of high speed
converters, which include 10, 12, and 14-bit devices.
Ordering Information
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
ISL5757IB
ISL5757IBZ
(See Note)
ISL5757IA
ISL5757IAZ
(See Note)
ISL5757EVAL1
NUMBER
PART
-40 to 85 28 Ld SOIC
-40 to 85 28 Ld SOIC
-40 to 85 28 Ld TSSOP
-40 to 85 28 Ld TSSOP
RANGE
TEMP.
(°C)
25
(Pb-free)
(Pb-free)
SOIC Evaluation Platform
®
PACKAGE
1
Data Sheet
M28.3
M28.3
M28.173
M28.173
DWG. #
PKG.
260MHz
260MHz
260MHz
260MHz
260MHz
CLOCK
SPEED
1-888-INTERSIL or 321-724-7143
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Low Power . . . . . 103mW with 20mA Output at 130MSPS
• Adjustable Full Scale Output Current . . . . . 2mA to 20mA
• +3.3V Power Supply
• 3V LVCMOS Compatible Inputs
• Excellent Spurious Free Dynamic Range
• UMTS Adjacent Channel Power = 65dB at 19.2MHz
• EDGE/GSM SFDR = 83dBc at 11MHz in 20MHz Window
• Pin compatible, 3.3V, Lower Power Replacement For The
• Pb-Free Available (RoHS Compliant)
Applications
• Cellular Infrastructure - Single or Multi-Carrier: IS-136,
• BWA Infrastructure
• Medical/Test Instrumentation
• Wireless Communication Systems
• High Resolution Imaging Systems
• Arbitrary Waveform Generators
Pinout
November 12, 2004
(71dBc to Nyquist, f
AD9750 and HI5760
IS-95, GSM, EDGE, CDMA2000, WCDMA, TDS-CDMA
All other trademarks mentioned are the property of their respective owners.
D9 (MSB)
D0 (LSB)
|
DCOM
DCOM
DCOM
DCOM
Intersil (and design) is a registered trademark of Intersil Americas Inc.
D8
D7
D6
D5
D4
D3
D2
D1
Copyright © Intersil Americas Inc. 2004. All Rights Reserved
10
11
12
13
14
1
2
3
4
5
6
7
8
9
S
= 130MSPS, f
TOP VIEW
ISL5757
OUT
28
27
26
25
24
23
22
21
20
19
18
17
16
15
= 10MHz)
ISL5757
CLK
DV
DCOM
NC
AV
COMP
IOUTA
IOUTB
ACOM
NC
FSADJ
REFIO
REFLO
SLEEP
DD
FN6078.1
DD

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isl5757 Summary of contents

Page 1

... Data Sheet 10-bit, +3.3V, 260+MSPS, High Speed D/A Converter The ISL5757 is a 10-bit, 260+MSPS (Mega Samples Per Second), CMOS, high speed, low power, D/A (digital to analog) converter, designed specifically for use in high performance communication systems such as base transceiver stations utilizing 2. cellular protocols. ...

Page 2

... Typical Applications Circuit 50Ω BEAD + 10µH 10µF 0.1µF Functional Block Diagram (LSB (MSB) D9 CLK 2 ISL5757 ISL5757 (25, 19) NC (15) SLEEP (16) REFLO (17) REFIO (3) (18) FSADJ (5) (22) IOUTA D4 D4 (6) (21) IOUTB (8) ...

Page 3

... DD 28 CLK 3 ISL5757 Digital Data Bit 9, (Most Significant Bit) through Digital Data Bit 0, (Least Significant Bit). Control Pin for Power-Down mode. Sleep Mode is active high; Connect to ground for Normal Mode. Sleep pin has internal 20µA active pulldown current. Connect to analog ground to enable internal 1.2V reference or connect to AV reference ...

Page 4

... IOUTFS = 2mA AC CHARACTERISTICS (Using Figure 13 with R Spurious Free Dynamic Range, f CLK SFDR Within a Window f CLK f CLK 4 ISL5757 Thermal Information Thermal Resistance (Typical, Note 1) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . + 0.3V Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150° 0.3V Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C DD Maximum Lead Temperature (Soldering 10s 300°C ...

Page 5

... FSADJ Internal Reference Voltage Drift Internal Reference Output Current Reference is not intended to be externally loaded (REFIO pin) Sink/Source Capability Reference Input Impedance Reference Input Multiplying Bandwidth (Note 8) 5 ISL5757 = DV = +3.3V Internal 1.2V, IOUTFS = 20mA REF TEST CONDITIONS = 260MSPS 80.8MHz (Notes 4, 8) ...

Page 6

... Measured with the clock at 260MSPS and the output frequency at 40MHz. 8. See “Definition of Specifications”. 9. Recommended operation is from 3.0V to 3.6V. Operation below 3.0V is possible with some degradation in spectral performance. Reduction in analog output current may be necessary to maintain spectral performance. 10. See Typical Performance Plots. 6 ISL5757 = DV = +3.3V Internal 1.2V, IOUTFS = 20mA REF TEST CONDITIONS ° ...

Page 7

... WITH 30kHz RBW FIGURE 3. GSM AT 11MHz, 78MSPS CLOCK (86+dBc @ ∆f = +6MHz, 3dB PAD) FIGURE 5. FOUR EDGE CARRIERS AT 12.4-15.6MHz, 800kHz SPACING, 78MSPS (67dBc - 20MHz WINDOW) 7 ISL5757 = 100Ω and R = 50Ω) DIFF LOAD FIGURE 2. EDGE AT 11MHz, 78MSPS CLOCK (75dBc -NYQUIST, 6dB PAD) FIGURE 4 ...

Page 8

... FIGURE 9. ONE TONE AT 40.4MHz, 210MSPS CLOCK (61dBc - NYQUIST, 6dB PAD) FIGURE 11. TWO TONES ( 8.5MHz, 50MSPS CLOCK, 500kHz SPACING (80dBc - 10MHz WINDOW, 6dB PAD) 8 ISL5757 = 100Ω and R DIFF SPECTRAL MASK UMTS TDD P>43dBm BTS FIGURE 8. ONE TONE AT 10.1MHz, 80MSPS CLOCK FIGURE 10 ...

Page 9

... W-CDMA standard for cellular applications which uses 3.84MHz modulated carriers. Detailed Description The ISL5757 is a 10-bit, current out, CMOS, digital to analog converter. The maximum update rate is at least 260+MSPS and can be powered by a single power supply in the recommended range of +3.0V to +3.6V. It consumes less than 120mW of power when using a +3 ...

Page 10

... ISL5757 Analog Output IOUTA and IOUTB are complementary current outputs. The sum of the two currents is always equal to the full scale output current minus one LSB. If single ended use is desired, a load resistor can be used to convert the output current to a voltage ...

Page 11

... SU D9- OUT FIGURE 15. PROPAGATION DELAY, SETUP TIME, HOLD TIME AND MINIMUM PULSE WIDTH DIAGRAM 11 ISL5757 Propagation Delay The converter requires two clock rising edges for data to be represented at the output. Each rising edge of the clock = (2 x IOUTA captures the present data word and outputs the previous 1:1 data. The propagation delay is therefore 1/CLK, plus < ...

Page 12

... The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimen- sions are not necessarily exact. 12 ISL5757 M28.3 (JEDEC MS-013-AE ISSUE C) 28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE M B ...

Page 13

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 ISL5757 M28.173 M B ...

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